Image Number 5 for United States Patent #5475328.
In a logarithmic intermediate frequency amplifier circuit including first through Mth intermediate frequency amplifiers which are connected in cascade and first through Mth double balanced differential circuits which are connected to the first through the Mth intermediate frequency amplifiers, respectively, each of the first through the Mth double balanced differential circuits comprises primary, secondary, and tertiary differential circuits. The primary differential circuit includes a pair of transistors each of which is one of NPN and PNP types and which are connected to a first constant current source. The secondary differential circuit includes a pair of transistors each of which is another one of NPN and PNP types and which are connected to a second constant current source. The tertiary differential circuit includes a pair of transistors each of which is the other one of the NPN and the PNP types and which are connected to a third constant current source. The primary differential circuit is connected to the second and the third constant current sources and delivers a differential output to the secondary and the tertiary differential circuits so as to reduce currents of the second and the third constant current sources.
