Resources Contact Us Home
Burn-in technologies for unpackaged integrated circuits

Image Number 5 for United States Patent #5397997.

A device and method for burn-in of bare chips prior to assembly into a multichip module. Each die to be tested is positioned with its I/O pads positioned to face an interconnection burn-in test substrate which may be a silicon circuit board. Each die is temporarily electrically connected to the substrate by a deformable solder bump.

  Recently Added Patents
Method of patterning color conversion layer and method of manufacturing organic EL display using the patterning method
Visual model importation
Proton conducting electrolytes with cross-linked copolymer additives for use in fuel cells
Selecting from a plural of energy saving modes
Perception-based artifact quantification for volume rendering
Binder for secondary battery providing excellent adhesion strength and cycle property
Systems and methods for building axes, co-axes and paleo-geographic coordinates related to a stratified geological volume
  Randomly Featured Patents
Semiconductor integrated circuit and amplifier for suppressing pop sound while minimizing voltage transition settling time
Dental bib with attached adhesive tab
Structure with a plurality of substrates, its manufacturing method and crystal oscillator with the structure
Method for checking the operability of an ambient pressure sensor of an internal combustion engine
Percutaneously-deliverable mechanical valve
Paper clip
Adaptive tuning of the perceptual model
Process for producing hydrogenated polymers
Refractory lining system for high wear area of high temperature reaction vessel
Optical sheet having irregularity portions, backlight device with optical sheet, and liquid crystal display device including a backlight device with optical sheet