Resources Contact Us Home
Burn-in technologies for unpackaged integrated circuits

Image Number 5 for United States Patent #5397997.

A device and method for burn-in of bare chips prior to assembly into a multichip module. Each die to be tested is positioned with its I/O pads positioned to face an interconnection burn-in test substrate which may be a silicon circuit board. Each die is temporarily electrically connected to the substrate by a deformable solder bump.

  Recently Added Patents
Clock generator circuit for a charge pump
Method and apparatus to select a profile of a digital communication line
Remote management of networked systems using secure modular platform
Deposition apparatus and method for manufacturing organic light emitting diode display using the same
Semiconductor memory device, test circuit, and test operation method thereof
Non-phosphorus-based gellant for hydrocarbon fluids
Electric connection box
  Randomly Featured Patents
Cutting insert
Control of pests with annonaceous acetogenins
Process for preparing a substrate coated with a biomolecule
Manufacturing plant
Disk brake associated with hand brake lever
Antibacterial substance BE-24566B
Method for imparting cyclohexanedione and/or aryloxyphenoxypropanioc acid herbicide tolerance to maize plants
Method for operation system startup
System and method for aligning and leveling tile
Vehicular headlamp