Resources Contact Us Home
Burn-in technologies for unpackaged integrated circuits

Image Number 5 for United States Patent #5397997.

A device and method for burn-in of bare chips prior to assembly into a multichip module. Each die to be tested is positioned with its I/O pads positioned to face an interconnection burn-in test substrate which may be a silicon circuit board. Each die is temporarily electrically connected to the substrate by a deformable solder bump.

  Recently Added Patents
Methods for processing 2Nx2N block with N being positive integer greater than four under intra-prediction mode and related processing circuits thereof
Panel for decoration
Facility to reuse paper
Fire detector
Multipoint photonic doppler velocimetry using optical lens elements
Container pack
Acoustic measuring instrument
  Randomly Featured Patents
Semiconductor package
Printing paper and a process for its manufacture
Inflatable mattress and method of making the same
Laser medical device
Magnetic disk storage apparatus
Stabilized ball joint
Housing for a computing device
Method of reducing charging damage to integrated circuits during semiconductor manufacturing
Methods for providing support for conductive structures protruding from semiconductor device components