Resources Contact Us Home
Burn-in technologies for unpackaged integrated circuits

Image Number 5 for United States Patent #5397997.

A device and method for burn-in of bare chips prior to assembly into a multichip module. Each die to be tested is positioned with its I/O pads positioned to face an interconnection burn-in test substrate which may be a silicon circuit board. Each die is temporarily electrically connected to the substrate by a deformable solder bump.

  Recently Added Patents
Maltol ether processes and intermediates
Oxide material, electrophotographic photoreceptor, process cartridge, and image forming device
Semiconductor device comprising a Fin and method for manufacturing the same
Methods and systems for use in tracking targets for direction finding systems
Heating pad
Message processing method and apparatus based on the SIP protocol and an IP communication system
Vehicle drive control system
  Randomly Featured Patents
Splicing means for faced insulation batts
Battery of high temperature secondary cells
Fishing rod reel seat
Process for warp-free pigmenting of polyolefins
Removable head for connection to a percutaneous passage
Encoding method and device, decoding method and device, and systems using them
Combined pen, watch and tire pressure gauge
Gutter enhancing device and method
Multimedia feature for diagnostic instrumentation
Metallizing paste for silicon carbide sintered body and a semiconductor device including the same