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DRAM device having cells staggered along adjacent rows and sources and drains aligned in a column direction

Image Number 3 for United States Patent #5396451.

A dynamic random access memory (DRAM) device includes: a plurality of sense amplifiers; bit lines connected to the amplifiers, respectively; a first group of memory cells arranged in a row and connected to one of the bit lines; and a second group of memory cells arranged in a row and connected to the same bit line; the first and second groups being arranged side by side and adjacently to each other, shifted one from the other by a half of a memory cell pitch, and connected alternately to each other in an open bit line system.

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