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Manufacturing method of a semiconductor device










Image Number 3 for United States Patent #5356838.

A method of manufacturing and a structure of a semiconductor device has an I/O terminal whereby when individual semiconductor chips are separated from the semiconductor wafer manufactured according to this invention, the terminals are exposed on the edges of the semiconductor chip allowing for the interconnection of the terminals when the semiconductor chips are stacked. The bump electrode is formed using metal masks and magnets by mounting a solder ball on an aperture of a first mask to form the solder bump on an electrode pad provided on a semiconductor wafer. A conductive material forms a conductive pattern between the solder bumps of the individual semiconductor chips using an aperture of a second mask. The individual semiconductor chips which are separated from the semiconductor wafer are then easily stacked and packaged by use of the I/O terminals on the sides of the individual semiconductor chips.








 
 
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