Resources Contact Us Home
Method of manufacturing semiconductor device including formation of alignment mark

Image Number 7 for United States Patent #5310691.

A p.sup.- semiconductor substrate has a surface which is high in a memory cell region and low in a peripheral circuit region. An n.sup.+ buried semiconductor layer of uniform thickness is formed on the substrate. An n.sup.- epitaxial layer formed on the buried semiconductor layer is thin in the memory cell region and thick in the peripheral circuit region, so that the surface of the epitaxial layer can be flat. A concave or convex step is formed on the surface of the epitaxial layer in a boundary portion between the memory cell region and the peripheral circuit region in order to use it as an alignment mark in a later processing step.

  Recently Added Patents
Battery grid
Method for driving bistable display device
Surface modification
Materials for organic electroluminescent devices containing substituted 10-benzo[c]phenanthrenes
Per-request control of DNS behavior
Semiconductor pressure sensor
Heap/stack guard pages using a wakeup unit
  Randomly Featured Patents
Focused planar transducer
Method for producing a p-doped semiconductor region in an n-conductive semiconductor body
Analog-to-digital converter having selectively and independently controllable sampling and conversion periods
Method for dry isolation of a water passage of a dam
Method for real time monitoring and control of load sterilization and parametric release
Coffee making machine
Generating a recipient list for propagating contact information changes based on contact metrics involving a user and the recipients on the list
Method of surgically treating scoliosis
System and method for displaying air traffic information
Alternating current inductive charging of a photoreceptor