Resources Contact Us Home
Method of manufacturing semiconductor device including formation of alignment mark

Image Number 7 for United States Patent #5310691.

A p.sup.- semiconductor substrate has a surface which is high in a memory cell region and low in a peripheral circuit region. An n.sup.+ buried semiconductor layer of uniform thickness is formed on the substrate. An n.sup.- epitaxial layer formed on the buried semiconductor layer is thin in the memory cell region and thick in the peripheral circuit region, so that the surface of the epitaxial layer can be flat. A concave or convex step is formed on the surface of the epitaxial layer in a boundary portion between the memory cell region and the peripheral circuit region in order to use it as an alignment mark in a later processing step.

  Recently Added Patents
Powerline communication receiver
Head shield
MiR 204, miR 211, their anti-miRs, and therapeutic uses of same
FET device having ultra-low on-resistance and low gate charge
Instantaneous single click perpetual date mechanism
Treatment of celiac disease with IgA
  Randomly Featured Patents
Cylinder-type inflator for airbag module
Split Florida-helix magnet
Zero insertion force connector, particularly for an integrated circuit
System and method for generating a musical compilation track from multiple takes
Scanning images for pornography
Cleaning apparatus
Apparatus and process for recovering metals from aqueous solutions
Polyactic acid resin composition
Adjustable table lamp
Bis-Schiff base ligand-containing mono-metallocene olefin polymerization catalyst, its preparation process and application