Resources Contact Us Home
Method of manufacturing semiconductor device including formation of alignment mark

Image Number 7 for United States Patent #5310691.

A p.sup.- semiconductor substrate has a surface which is high in a memory cell region and low in a peripheral circuit region. An n.sup.+ buried semiconductor layer of uniform thickness is formed on the substrate. An n.sup.- epitaxial layer formed on the buried semiconductor layer is thin in the memory cell region and thick in the peripheral circuit region, so that the surface of the epitaxial layer can be flat. A concave or convex step is formed on the surface of the epitaxial layer in a boundary portion between the memory cell region and the peripheral circuit region in order to use it as an alignment mark in a later processing step.

  Recently Added Patents
Systems and methods for resuming capture of a base image of an object by a mobile scanner
Radio base station and communication control method
Vector smoothing of complex-valued cross spectra to estimate power spectral density of a noise signal
Translation of entity names based on source document publication date, and frequency and co-occurrence of the entity names
Method and apparatus for traffic management in a wireless network
Direct memory access (DMA) address translation between peer-to-peer input/output (I/O) devices
Framework for specifying access to protected content
  Randomly Featured Patents
Eatable taste modifiers
Portable water filter
Pool cleaner component
Multi-layer circuit construction methods and structures with customization features and components for use therein
Regulated aeration of gases exhausting through a propeller
Unbalance vibration generator
Methods of therapy for HIV infection
Image processing apparatus and image display apparatus using same
System and method for standardizing accounting of consumables
Panel supported sign frame