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Switch coupled between input and output ports in communication system










Image Number 3 for United States Patent #5303231.

A switch includes a plurality of memories respectively having write terminals connected to input ports and output terminals, each of the memories including an input acknowledgement signal generating block for generating an input acknowledgement signal when data is received thereto. A multiplexer, which is coupled between the read terminals of the memories and an output port, connects one of the memories to the output port in response to a port number signal. An output controller, which is coupled to the memories and the multiplexer, receives the input acknowledgement signal from each of the memories in order of receipt and generating the port number signal so that data stored in the memories is selected by the multiplexer in order of receipt of the input acknowledgement signal.








 
 
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