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Semiconductor device










Image Number 5 for United States Patent #5250760.

A semiconductor device of a multilayer interconnection structure which includes a plurality of insulating layers and a plurality of metal interconnection layers. The uppermost metal interconnection layer is formed in a hall in the uppermost interlayer insulating layer. The uppermost interconnection layer is formed as a bonding pad portion and a part of the layer is formed into a ring-shaped portion so as to cover the side portion of the hall.








 
 
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