Image Number 10 for United States Patent #5212723.
A method and apparatus for synchronizing a randomized video signal to a phase-locked sampling system. The phase-locked system is part of a scrambling apparatus capable of scrambling and subsequent descrambling of video signals recorded on videotape recorders which undesirably introduce time-base errors into the luminance/chrominance phase relationship. These time-base errors are removed without use of a time-base corrector by programmable delay line memory circuitry which introduces a programmable amount of delay into the video path. The delay line includes a programmable length FIFO memory module.