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Method of forming a static random access memory device










Image Number 3 for United States Patent #5200356.

A static random access memory device includes memory cells each having four MOS transistors and two load resistors which form a flip-flop circuit. The load resistor is formed by ion implantation of impurities in a predetermined region of an oxide film which is an extension of a gate insulating film of the MOS transistor. A power supply interconnection is connected to a surface of the load resistor. The word line and power supply interconnection are formed of a stacked structure having a polysilicon layer and a high melting metal silicide layer.








 
 
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