Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Semiconductor memory device wired to accommodate increased capacity without increasing the size of the semiconductor memory device










Image Number 7 for United States Patent #5195053.

A boundary region for wiring is provided by expanding one of a plurality of boundary regions boundary regions each being between adjacent ones of a plurality of decoder circuits included in a decoder circuit block corresponding to a memory cell array by shifting a desired portion of at least one of the decoder circuits by a desired distance and a wiring connecting wirings in the decoder circuit to a circuit provided outside the decoder circuit block is arranged in the boundary region for wiring, so that a circuit arrangement in a second region outside the decoder circuits can be made freely.








 
 
  Recently Added Patents
SIC semiconductor device and method for manufacturing the same
Data output apparatus and data output method
Dynamically updating privacy settings in a social network
Systems, methods, and media for firewall control via remote system information
Personal alarm device for headwear for proximity detection
Organic light emitting diode device and fabrication method thereof
Probe for ultrasound diagnostic apparatus
  Randomly Featured Patents
Reverse phase hydrophilic polymers and their use in water-expandable elastomeric compositions
Door frame apparatus for exercise
Activated electrodes
Control apparatus and method for internal combustion engine with variably operated engine valve
Oxide semiconductor thin film transistor, method of manufacturing the same, and organic electroluminescent device including the same
Electrical distribution wiring system
Color cathode ray tube
Pressure gauge
Epitaxial process for the fabrication of a field effect transistor having improved threshold stability
Venting closure assembly