Resources Contact Us Home
Semiconductor memory device wired to accommodate increased capacity without increasing the size of the semiconductor memory device

Image Number 7 for United States Patent #5195053.

A boundary region for wiring is provided by expanding one of a plurality of boundary regions boundary regions each being between adjacent ones of a plurality of decoder circuits included in a decoder circuit block corresponding to a memory cell array by shifting a desired portion of at least one of the decoder circuits by a desired distance and a wiring connecting wirings in the decoder circuit to a circuit provided outside the decoder circuit block is arranged in the boundary region for wiring, so that a circuit arrangement in a second region outside the decoder circuits can be made freely.

  Recently Added Patents
Regenerative braking control to mitigate powertrain oscillation
Systems and methods for providing television signals using a network interface device
Weighted determination in configuration management systems
Method of manufacturing semiconductor device and semiconductor device
Motilin-like peptide compound having transmucosal absorbability imparted thereto
Wafer level packaging structure with large contact area and preparation method thereof
3,7-diamino-10H-phenothiazine salts and their use
  Randomly Featured Patents
Pultruded FRP structural assembly for water cooling towers
Process for producing methacrylic acid
Gable overhang
Photoconductor unit for forming an image
Turbine cooling vane of gas turbine engine
MIM capacitor having flat diffusion prevention films
Display element drive method
Olefin oligomerization process
Peanut ornament
Gaming headset