Resources Contact Us Home
Semiconductor memory device wired to accommodate increased capacity without increasing the size of the semiconductor memory device

Image Number 5 for United States Patent #5195053.

A boundary region for wiring is provided by expanding one of a plurality of boundary regions boundary regions each being between adjacent ones of a plurality of decoder circuits included in a decoder circuit block corresponding to a memory cell array by shifting a desired portion of at least one of the decoder circuits by a desired distance and a wiring connecting wirings in the decoder circuit to a circuit provided outside the decoder circuit block is arranged in the boundary region for wiring, so that a circuit arrangement in a second region outside the decoder circuits can be made freely.

  Recently Added Patents
Disk-based storage device having read channel memory that is selectively accessible to disk controller
Apparatus and method of preventing signal delay in display device
Glycosyltransferase promoter
Method of preparing MgB.sub.2 superconducting wire and the MgB.sub.2 superconducting wire prepared thereby
Generating and modifying textual code interfaces from graphical programs
Ultrathin fluid-absorbent cores
Quaternary chalcogenide wafers
  Randomly Featured Patents
Book container
Nonvolatile semiconductor storage device and data writing method therefor
Semiconductor systems utilizing materials that form rectifying junctions in both N and P-type doping regions, whether metallurgically or field induced, and methods of use
Parabolic-shaped reflecting shade
High-pressure discharge lamp having a single socket
Hovercraft toy vehicle
Extruded bar
Training apparatus for racket sports
Shallow trench isolation structures and a method for forming shallow trench isolation structures
Box for raised floors