Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Manufacturing method of well region in coms intergrated circuit










Image Number 9 for United States Patent #5114868.

First, N-type channel stoppers are formed in an element formation region of a P-channel MOS transistor and in an element isolation region of the P-channel MOS transistor, of a CMOS transistor. After forming a field oxide film, an N well is formed in the element formation region of the P-channel MOS transistor. In spite of the fact that the dose of ions used for the formation of an N-type channel stopper is smaller than the dose of ions used for the formation of an N well, the surface concentration of the N-type impurity of the N-type channel stopper is higher than that of the N well. The N-type impurity concentration in the portion where the N-type channel stopper and the N well are brought into contact, becomes uniform. The variability in the threshold voltage of the P-channel MOS transistor, the threshold voltage of the P-channel parasitic MOS transistor, the junction breakdown voltage of the P.sup.+ diffused layer and the junction capacitance of the P.sup.+ diffused layer is reduced, so that the device obtained is suited for the submicron process.








 
 
  Recently Added Patents
Inhibitors of human immunodeficiency virus replication
Semiconductor device and method for fabricating the same
Buckle (tube)
Restore software with aggregated view of content databases
Knee guard
Program recording medium, image processing apparatus, imaging apparatus, and image processing method
High order continuous time filter
  Randomly Featured Patents
Method of making a surgical suture
Preparation of 3-cyano-3, 5, 5-trimethylcyclohexanone
Obstruction avoidance continuous seam welding system
Bonding of leads
Hard tissue drug delivery device and method
Double trigger pump
Electro-optic device with particular location of electrode cross-overs
Generating laser pulses of narrow spectral linewidth based on chirping and stretching of laser pulses and subsequent power amplification
Gate for injection mold die channel
Method and system for measuring patterned structures