Resources Contact Us Home
Multi-layer semiconductor device

Image Number 11 for United States Patent #5051865.

A multi-layer semiconductor device which includes a stacked wafer body having a plurality of sets of two semiconductor wafers and a heat sink plate interposed therebetween. An end of the heat sink plate of each set of wafers is exposed at at least one of the side surfaces of the stacked wafer body.An intermediate connecting circuit is provided for connecting circuits in each of the sets of two semiconductors wafers, the intermediate connecting circuit is provided on at least one side surface other than the surface at which the ends of the heat sink plate are exposed.

  Recently Added Patents
Liquid crystal display wherein the data lines covered by each pixel electrode are supplied with data signals of opposite polarities
Semiconductor device and method of manufacturing the same
Tomlinson Harashima precoding with additional receiver processing in a multi-user multiple-input multiple-output wireless transmission system
Fabrication of thin pellicle beam splitters
Optical interconnect in high-speed memory systems
Electronic system with vertical intermetallic compound
Flexible pouch
  Randomly Featured Patents
Electromagnetic driving device
Power source circuit for microwave oven
Disk holder pop-out preventing device
Adjustment method and apparatus for a boring tool
Method and circuit for detecting and compensating for drop-out and distortion of frequency modulated video signals
Gas barrier composition and molded resin
Polymers with high internal free volume
Switchable current-reference voltage generator
Dynamic memory word line driver scheme
Out-of-balance condition detecting system with lid actuated switching assembly