Resources Contact Us Home
Multi-layer semiconductor device

Image Number 11 for United States Patent #5051865.

A multi-layer semiconductor device which includes a stacked wafer body having a plurality of sets of two semiconductor wafers and a heat sink plate interposed therebetween. An end of the heat sink plate of each set of wafers is exposed at at least one of the side surfaces of the stacked wafer body.An intermediate connecting circuit is provided for connecting circuits in each of the sets of two semiconductors wafers, the intermediate connecting circuit is provided on at least one side surface other than the surface at which the ends of the heat sink plate are exposed.

  Recently Added Patents
Hermetically sealed atomic sensor package manufactured with expendable support structure
Method for selective deposition of a semiconductor material
Adaptive contact window wherein the probability that an answering user/expert will respond to a question corresponds to the answering users having response rates that are based on the time of
Electronic control apparatus
Apparatus for electrographic printing or copying
Optimization of packaging sizes
  Randomly Featured Patents
Dental prophylactic cup
Collapsible easy chair
Low pressure olefin recovery process
Printing paper and method of image formation employing the same
Apparatus and method for performing ligand binding assays on microarrays in multiwell plates
On-demand provisioning of computer resources in physical/virtual cluster environments
Expression of fusion polypeptides transported out of the cytoplasm without leader sequences
Electrochromic windows and method of making the same