Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Method for making an electrically erasable programmable read only memory cell having a three dimensional floating gate










Image Number 5 for United States Patent #4975383.

An electrically programmable read only memory device formed in a face of a semiconductor substrate which includes a floating gate transistor having a floating gate and a control gate formed at least partially in a trench in the substrate.








 
 
  Recently Added Patents
Semiconductor device and method of forming multi-layered UBM with intermediate insulating buffer layer to reduce stress for semiconductor wafer
Terminal apparatus and diversity antenna control method for the same
On-chip millimeter wave lange coupler
Ball end hex wrench
Liquid crystal display device
Transaction product with electrical circuit
Image quality evaluation method, system, and program based on an alternating-current component differential value
  Randomly Featured Patents
Method for heat treating and sintering metal oxides with microwave radiation
Method for biosynthesizing the serotonin derivatives in plants
Inter-layer motion prediction method using resampling
Focus detection device having a mechanism for adjusting light-receiving state
RF tag on test strips, test strip vials and boxes
Skin incising device
Formulations for pharmaceutical agents ionizable as free acids or free bases
Newsprint papers
Current mode data or power bus
Formulation and process for controlling social insects