Resources Contact Us Home
Method for making an electrically erasable programmable read only memory cell having a three dimensional floating gate

Image Number 5 for United States Patent #4975383.

An electrically programmable read only memory device formed in a face of a semiconductor substrate which includes a floating gate transistor having a floating gate and a control gate formed at least partially in a trench in the substrate.

  Recently Added Patents
Methods of diagnosing a plasmodium infection
Hand sign
Audiovisual multi-room support
Methods, systems, and media for swapping faces in images
Low temperature pressure chamber unit, magnetic resonance device with a low temperature pressure chamber unit, and an attachment method to attach at least one add-on unit to an external housin
Signal activated molecular delivery
Process for manufacturing a self-sealing composition
  Randomly Featured Patents
Underguard of an automobile
3-mercaptoacetylamino-1,5-substituted-2-oxo-azepan derivatives useful as inhibitors of matrix metalloproteinase
Method of determining current-voltage characteristics of a device
Circuit for switching and transmitting alternating voltages
Ball valve assembly
Monolithic integrated circuit/pressure sensor on pacing lead
Valve train with a single camshaft
Remotely activated electrical discharge restraint device using biceps' flexion of the leg to restrain
Methods and apparatus for tandem mass spectrometry
Bioresorbable compositions for implantable prostheses