Resources Contact Us Home
Method for making an electrically erasable programmable read only memory cell having a three dimensional floating gate

Image Number 5 for United States Patent #4975383.

An electrically programmable read only memory device formed in a face of a semiconductor substrate which includes a floating gate transistor having a floating gate and a control gate formed at least partially in a trench in the substrate.

  Recently Added Patents
Method of manufacturing a plurality of electronic assemblies
Titanium compounds and complexes as additives in lubricants
Control method and allocation structure for flash memory device
Electronic component, a semiconductor wafer and a method for producing an electronic component
Device to control force required to depress accelerator pedal
Patterned MR device with controlled shape anisotropy
Method and apparatus for supporting delivery, sale and billing of perishable and time-sensitive goods such as newspapers, periodicals and direct marketing and promotional materials
  Randomly Featured Patents
Alignment mark, alignment apparatus and method, exposure apparatus, and device manufacturing method
Wet diaper detector
Single-dose beverage cup and rectangular cross-section straw assembly
Processor module with dual-bank SRAM cache having shared capacitors and R-C elements integrated into the module substrate
Light detection equipment in components with optical access
Power factor regulating method for connection of a capacitor to a line and apparatus embodying the method
Device for selective detection of gas
Prosthetic device utilizing electric vacuum pump
Transmission slip control