Resources Contact Us Home
Method for making an electrically erasable programmable read only memory cell having a three dimensional floating gate

Image Number 5 for United States Patent #4975383.

An electrically programmable read only memory device formed in a face of a semiconductor substrate which includes a floating gate transistor having a floating gate and a control gate formed at least partially in a trench in the substrate.

  Recently Added Patents
Approaching object detection system
Manufacturing process for cellular screening substratum, resultant substratum, and method and apparatus for screening
Manufacturing method for semiconductor device carrier and semiconductor package using the same
Methods and compositions for inhibiting progression to chronic cardiac failure
Reduction of HMF ethers with metal catalyst
Imaging apparatus for calculating a histogram to adjust color balance
Lubricant composition
  Randomly Featured Patents
Prefixing in a multiprocessing system
Multi-segment air bag tether construction
Telephone charge integrating and displaying device and system
Audio interface for computer
Rear frame for bicycle
Circuit arrangement for monitoring a control circuit
Lightweight, reduced density fire rated gypsum panels
Insulating structure for magnetic coils
Audiovisual communications terminal apparatus for teleconferencing and method
Systems and methods for micro-contact stamping