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Gate turn-off thyristor and method of producing same

Image Number 4 for United States Patent #4910573.

A gate turn-off thyristor (GTO) having a semi-conductor substrate (1) with at least one p-conducting anode layer (4), one n-type base layer (6), one p-type base layer (7) which is in electrical contact with a gate, and one n-conducting cathode layer (8) has a cathode layer (8) with a highly doped zone (10) acting as n.sup.+ emitter and a lightly doped zone (9). The highly doped zone (10) adjoins the surface of the semi-conductor substrate (1) and has a doping density which is at least an order of magnitude higher than that of the p-type base layer (7). The lightly doped zone (9) is situated between a pn junction J.sub.1, produced by the p-type base layer (7) and the cathode layer (8), and the highly doped zone (10) of the cathode layer (8). In a preferred embodiment of the invention, the highly doped zone (10) is so structured that the lightly doped zone (9) extends, in a GTO with mesa structure, from the pn junction J.sub.1 to the surface of the semi-conductor substrate (1) in a central strip (5) of the cathode fingers (2). A method for producing GTO's according to the invention is furthermore specified.

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