Resources Contact Us Home
Semiconductor memory device having test pattern generating circuit

Image Number 7 for United States Patent #4821238.

A semiconductor memory device comprises an internal circuit including a memory circuit; a test pattern generating circuit; an element for receiving external signals supplied from the outside; and an input switching circuit connected between the test pattern generating circuit and the receiving element, for switching the input supplied to the internal circuit between output signals generating from the test pattern generating circuit and the external signals, the output signals generated from the test pattern generated circuit being input to the internal circuit through the input switching circuit in a test mode, the external signals being input to the internal circuit through the input switching circuit in a usual mode; the test pattern generating circuit, the input switching circuit, and the internal circuit being provided on the same chip.

  Recently Added Patents
Heterogeneous language data typing without executable regeneration
Sampling switch circuit that uses correlated level shifting
Switching module and switching synchronization system
Monitoring system
Sitagliptin intermediate compounds, preparation methods and uses thereof
Method and apparatus for cutting high quality internal features and contours
Power device and method of packaging same
  Randomly Featured Patents
Pharmaceutical compositions of cholesteryl ester transfer protein inhibitors
Control system and method for AC motor driven cyclic load
Method of treating multiple sclerosis with chalcone derivatives
Kit for decorated wishing well
Computer auto shut-off control method
Fiber-reinforced laminates and method for making them
Ultrasonic examination
Method for modifying chromosomes
Arrangement for mounting fixtures such as baggage compartments near the ceiling or a passenger cabin, especially in an aircraft
Composite wood product and method for making the wood product