Resources Contact Us Home
Semiconductor memory device having test pattern generating circuit

Image Number 7 for United States Patent #4821238.

A semiconductor memory device comprises an internal circuit including a memory circuit; a test pattern generating circuit; an element for receiving external signals supplied from the outside; and an input switching circuit connected between the test pattern generating circuit and the receiving element, for switching the input supplied to the internal circuit between output signals generating from the test pattern generating circuit and the external signals, the output signals generated from the test pattern generated circuit being input to the internal circuit through the input switching circuit in a test mode, the external signals being input to the internal circuit through the input switching circuit in a usual mode; the test pattern generating circuit, the input switching circuit, and the internal circuit being provided on the same chip.

  Recently Added Patents
Methods and systems for distributing broadcast messages on various networks
Dry-cooling unit with gravity-assisted coolant flow
Financial transaction cards
Analysis of methylation using nucleic acid arrays
Manufacturing process for cellular screening substratum, resultant substratum, and method and apparatus for screening
System and method for determining payroll related insurance premiums
  Randomly Featured Patents
Apparatus for recording and/or reproducing information
Nail file with gripping handle
Method of making a decorative object having a notch-cut back side
Clamping cylinder
Fuel injection method for a direct-injection auto-ignition internal-combustion engine
Fluid handling floormat
Printed label, method and apparatus for manufacturing printed labels, and method and apparatus for attaching printed labels
Sonotrode for ultrasonic machining device
Method and apparatus for locating and securing a component in a computer system