Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Nonvolatile semiconductor memory device










Image Number 3 for United States Patent #4813018.

A nonvolatile semiconductor memory device comprises a random access memory (RAM) and an electrically programmable and erasable read only memory (EEPROM). Since a capacitance (106) is formed between a control gate (103) and a drain (102) of a memory transistor, and a source of the memory transistor is rendered to be floating in the RAM write and read operation and in the EEPROM write operation and is supplied with a finite potential in EEPROM read operation, the operation of nonvolatile memory is achieved. A sense amplifier (15, 16) is amplified the potential difference between a bit line (BL) and a control gate line (CGL) is both memory operation and latches the input data in both write operation, such that the potential of the BL and the CGL are determined low or high potential. Besides in the EEPROM write operation, after latching the input data in the sense amplifier, a nonvolatile program is started such that a BL or a CGL is pumped up to program voltage (15-20 V). In the EEPROM read operation, a BL and a CGL are pre-changed in a different potential (BL<CGL) after equalizing in a same potential (BL=CGL), then the source of memory transistor is supplied with a fininte potential. Therefore, when the EEPROM transistor is conductive, is programmed "0", a BL is pre-charged more than a CGL potential (BL>CGL). After that, the sense amplifier is activated and the EEPROM data is read out.








 
 
  Recently Added Patents
Image correction method
Structure of pixel electrode
Optical navigation device with image sensor and inner housing
Chair
(4947
Data consumption framework for semantic objects
Mobile communication terminal provided with handsfree function and controlling method thereof
  Randomly Featured Patents
Unified session detail records
Optoelectronic clock generator producing high frequency optoelectronic pulse trains with variable frequency and variable duty cycle and low jitter
Contest addressable memory (CAM) with tri-state inverters for data storage
Furniture foot stool
Process for improving thermal efficiency while producing power and desalinating water
3,4-dihydro-2H-pyrrolo[1,2-a]pyrazin-1-one derivatives for the modulation of the activity of protein kinases
Method and apparatus for sorting mailpieces
Indicator flag construction
Internal combustion engine and working cycle
Fluid recovery device for use in a numerically controlled lathe