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Semiconductor memory having self correction function

Image Number 18 for United States Patent #4747080.

A semiconductor memory having a self correction function, includes: a plurality of memory cells which are divided into a plurality of area groups, store data, and are arranged in a matrix; a plurality of parity cells, associated with the area groups of the memory cells, for forming horizontal and vertical parity codes together with the data in the memory cells of the respective area groups; word lines for simultaneously selecting the plurality of memory cells and the parity cells; bit lines for exchanging data with the memory cells; parity bit lines for exchanging parity bit data with the parity cells; selectors for selecting data of the memory cells and data of the parity cell in the area group to which a memory cell to be checked belongs; means for performing parity check of a plurality of data from the selectors; and means for automatically correcting a bit error using the output from the parity check means. The memory cells divided into the area groups and the parity cells combined therewith are arranged so as not to belong to the same horizontal and vertical arrays of the matrix.

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