Image Number 3 for United States Patent #4727468.
The PWM-controlled circuit includes an up/down counter and utilizes the fact that, when a numerical value is a complementary binary value, the sign is indicated by its most significant bit (sign bit). In the PWM control circuit, the up/down counter is controlled so that when its preset input receives a reference signal, a PWM signal of a duty factor proportional to the reference signal is directly obtained from the most significant bit of the output count.
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