Resources Contact Us Home
Balanced input buffer circuit for semiconductor memory

Image Number 2 for United States Patent #4280070.

A random access read/write MOS memory device employs bistable latch or buffer circuits as the address inputs, data inputs, and the like. The buffers function to latch the data or address to allow the inputs to change states. The buffer is activated by TTL level inputs, exhibits low capacitance at its input, and switches states fast enough to allow rapid multiplexing of the addresses. Noise immunity is improved by selective implants of some of the transistors, and by use of filter capacitors connected between input nodes and Vss rather than Vdd.

  Recently Added Patents
Likelihood of mobile device portal transition
Method for the recovery of a clock and system for the transmission of data between data memories by remote direct memory access and network station set up to operate in the method as a transmi
Set of toy bunny Easter egg ears
Position detection in a magnetic field
Drawer for holding beverage cartridges
Configurable common reference signal port for reference signal received power in distributed antenna systems
  Randomly Featured Patents
Method for sharing a resource and circuit making use of same
Mining apparatus and jet pump therefor
Linear sensor having a plurality of sensor rows
Battery system for implantable medical device
Multiple switch assembly
Aligning device for printing member in printer
Marine-drilling sub-base assembly for a soft-bottom foundation
Imidyl-benzene-dicarboxylic and -tricarboxylic acid derivatives
Endoscopic microsurgical instruments
Heterocyclic dyestuffs