Resources Contact Us Home
Balanced input buffer circuit for semiconductor memory

Image Number 2 for United States Patent #4280070.

A random access read/write MOS memory device employs bistable latch or buffer circuits as the address inputs, data inputs, and the like. The buffers function to latch the data or address to allow the inputs to change states. The buffer is activated by TTL level inputs, exhibits low capacitance at its input, and switches states fast enough to allow rapid multiplexing of the addresses. Noise immunity is improved by selective implants of some of the transistors, and by use of filter capacitors connected between input nodes and Vss rather than Vdd.

  Recently Added Patents
Hand-held electronic display device
Active pulse blood constituent monitoring
Silicon carbide substrate, epitaxial wafer and manufacturing method of silicon carbide substrate
Method for implementing dynamic pseudorandom keyboard remapping
Vehicle location information-based abnormal driving determination and warning system
Perception-based artifact quantification for volume rendering
Wireless enclosure
  Randomly Featured Patents
Doctor assembly in a paper machine with a jointed bearing
Image pickup system and image processing method with an edge extraction section
Dust collection hood for sand reclaimer, cooling, and blending rotary drum
Multi-station grinding machine with pivoted grinding elements
Segmented tubular body
Haptic to optic attachment for a soft iol
Valuable document
Modular communication cabling arrangement
Output circuit and battery pack
Multi-feed reflector antenna