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Driver circuit for developing quiescent and dynamic operating signals for complementary transistors










Image Number 2 for United States Patent #4041407.

The driver circuit includes a differential amplifier, a double-to-single ended converter, an emitter follower amplifier and an output stage having one portion for driving one external complementary transistor and another portion for driving another complementary transistor. The driver output transistors of each portion of the output stage each has a biasing network including a semiconductor junction and a resistor which are driven by a constant current source. The bias networks enable the driver output transistors to provide quiescent currents of known magnitudes for biasing the complementary output transistors and to have high current gains so that the current source is able to supply a constant current of minimal magnitude. The biasing networks further provide temperature compensation of the driver output transistors. The driver output stage is suitable for being driven by a single ended drive signal.








 
 
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