| Patent Number |
Title Of Patent |
Date Issued |
| 6484314 |
Exception handling method and system |
Nov. 19, 2002 |
| 6484313 |
Compiling and persisting of intermediate language code |
Nov. 19, 2002 |
| 6484312 |
Inferring operand types within an intermediate language |
Nov. 19, 2002 |
| 6484311 |
Coalescing properties, methods and events |
Nov. 19, 2002 |
| 6484310 |
Patterns for modeling computer component interactions |
Nov. 19, 2002 |
| 6484309 |
Enabling software designed for one operating system to operate on another operating system |
Nov. 19, 2002 |
| 6484308 |
System and method for ensuring data integrity on a removable hard drive |
Nov. 19, 2002 |
| 6484307 |
Method for fabricating and checking structures of electronic circuits in a semiconductor substra... |
Nov. 19, 2002 |
| 6484306 |
Multi-level scanning method for defect inspection |
Nov. 19, 2002 |
| 6484305 |
Impurity quantity transfer device enabling reduction in pseudo diffusion error generated at inte... |
Nov. 19, 2002 |
| 6484304 |
Method of generating application specific integrated circuits using a programmable hardware arch... |
Nov. 19, 2002 |
| 6484303 |
Apparatus for layout designing of semiconductor device, method of layout designing, and semicond... |
Nov. 19, 2002 |
| 6484302 |
Auto-contactor system and method for generating variable size contacts |
Nov. 19, 2002 |
| 6484301 |
System for and method of efficient contact pad identification |
Nov. 19, 2002 |
| 6484300 |
Systems, methods and computer program products for obtaining an effective pattern density of a l... |
Nov. 19, 2002 |
| 6484299 |
Method and apparatus for PCB array with compensated signal propagation |
Nov. 19, 2002 |
| 6484298 |
Method and apparatus for automatic timing-driven implementation of a circuit design |
Nov. 19, 2002 |
| 6484297 |
4K derating scheme for propagation delay and setup/hold time computation |
Nov. 19, 2002 |
| 6484296 |
Electrical rules checker system and method for reporting problems with tri-state logic in electr... |
Nov. 19, 2002 |
| 6484295 |
Electrical rules checker system and method providing quality assurance of tri-state logic |
Nov. 19, 2002 |
| 6484294 |
Semiconductor integrated circuit and method of designing the same |
Nov. 19, 2002 |
| 6484293 |
Method for determining optimal configuration for multinode bus |
Nov. 19, 2002 |
| 6484292 |
Incremental logic synthesis system for revisions of logic circuit designs |
Nov. 19, 2002 |
| 6484291 |
Library for storing pattern shape of connecting terminal and semiconductor circuit designed with... |
Nov. 19, 2002 |
| 6484290 |
IC package similar IDE interface solid state disk module and optimized pin design |
Nov. 19, 2002 |
| 6484289 |
Parallel data test for a semiconductor memory |
Nov. 19, 2002 |
| 6484288 |
Statistics signature generation and analysis |
Nov. 19, 2002 |
| 6484287 |
Macrodiversity transmission in a mobile radio system |
Nov. 19, 2002 |
| 6484286 |
Error signal calculation from a Viterbi output |
Nov. 19, 2002 |
| 6484285 |
Tailbiting decoder and method |
Nov. 19, 2002 |
| 6484284 |
Digital broadcasting system and method |
Nov. 19, 2002 |
| 6484283 |
Method and apparatus for encoding and decoding a turbo code in an integrated modem system |
Nov. 19, 2002 |
| 6484282 |
Test pattern generator, a memory testing device, and a method of generating a plurality of test ... |
Nov. 19, 2002 |
| 6484281 |
Software-based simulation system capable of simulating the combined functionality of a north bri... |
Nov. 19, 2002 |
| 6484280 |
Scan path test support |
Nov. 19, 2002 |
| 6484279 |
Testing system for evaluating integrated circuits, a testing system, and a method for testing an... |
Nov. 19, 2002 |
| 6484278 |
Method and apparatus for testing an embedded DRAM |
Nov. 19, 2002 |
| 6484277 |
Integrated memory having a redundancy function |
Nov. 19, 2002 |
| 6484276 |
Method and apparatus for providing extensible object-oriented fault injection |
Nov. 19, 2002 |
| 6484275 |
System and method for interfacing data with a test access port of a processor |
Nov. 19, 2002 |
| 6484274 |
Method for identifying and correcting error in a central processing unit |
Nov. 19, 2002 |
| 6484273 |
Integrated EJTAG external bus interface |
Nov. 19, 2002 |
| 6484272 |
Gate close balking for fair gating in a nonuniform memory architecture data processing system |
Nov. 19, 2002 |
| 6484271 |
Memory redundancy techniques |
Nov. 19, 2002 |
| 6484270 |
Electric device with flash memory built-in |
Nov. 19, 2002 |
| 6484269 |
Data storage system and method with improved data integrity value calculation |
Nov. 19, 2002 |
| 6484268 |
Signal transmission system having a timing adjustment circuit |
Nov. 19, 2002 |
| 6484267 |
Clock gated bus keeper |
Nov. 19, 2002 |
| 6484266 |
Method and an apparatus for reproducing bitstream having non-sequential system clock data seamle... |
Nov. 19, 2002 |
| 6484265 |
Software control of transistor body bias in controlling chip parameters |
Nov. 19, 2002 |
