| Patent Number |
Title Of Patent |
Date Issued |
| 6230265 |
Method and system for configuring resources in a data processing system utilizing system power c... |
May. 8, 2001 |
| 6230264 |
Parameterless language in a machine for implementation thereof |
May. 8, 2001 |
| 6230263 |
Data processing system processor delay instruction |
May. 8, 2001 |
| 6230262 |
Processor configured to selectively free physical registers upon retirement of instructions |
May. 8, 2001 |
| 6230261 |
Method and apparatus for predicting conditional branch instruction outcome based on branch condi... |
May. 8, 2001 |
| 6230260 |
Circuit arrangement and method of speculative instruction execution utilizing instruction histor... |
May. 8, 2001 |
| 6230259 |
Transparent extended state save |
May. 8, 2001 |
| 6230258 |
Processor using less hardware and instruction conversion apparatus reducing the number of types ... |
May. 8, 2001 |
| 6230257 |
Method and apparatus for staggering execution of a single packed data instruction using the same... |
May. 8, 2001 |
| 6230256 |
Data processing system having a bus wider than processor instruction width |
May. 8, 2001 |
| 6230255 |
Communications processor for voice band telecommunications |
May. 8, 2001 |
| 6230254 |
System and method for handling load and/or store operators in a superscalar microprocessor |
May. 8, 2001 |
| 6230253 |
Executing partial-width packed data instructions |
May. 8, 2001 |
| 6230252 |
Hybrid hypercube/torus architecture |
May. 8, 2001 |
| 6230251 |
File replication methods and apparatus for reducing port pressure in a clustered processor |
May. 8, 2001 |
| 6230250 |
Synchronous memory and data processing system having a programmable burst order |
May. 8, 2001 |
| 6230249 |
Methods and apparatus for providing logical cell available information in a memory |
May. 8, 2001 |
| 6230248 |
Method and apparatus for pre-validating regions in a virtual addressing scheme |
May. 8, 2001 |
| 6230247 |
Method and apparatus for adaptive storage space allocation |
May. 8, 2001 |
| 6230246 |
Non-intrusive crash consistent copying in distributed storage systems without client cooperation |
May. 8, 2001 |
| 6230245 |
Method and apparatus for generating a variable sequence of memory device command signals |
May. 8, 2001 |
| 6230244 |
Memory device with read access controlled by code |
May. 8, 2001 |
| 6230243 |
Method, system and program products for managing changed data of castout classes |
May. 8, 2001 |
| 6230242 |
Store instruction having vertical memory hierarchy control bits |
May. 8, 2001 |
| 6230241 |
Apparatus and method for transferring data in a data communications device |
May. 8, 2001 |
| 6230240 |
Storage management system and auto-RAID transaction manager for coherent memory map across hot p... |
May. 8, 2001 |
| 6230239 |
Method of data migration |
May. 8, 2001 |
| 6230238 |
Method and apparatus for accessing misaligned data from memory in an efficient manner |
May. 8, 2001 |
| 6230237 |
Content addressable memory with an internally-timed write operation |
May. 8, 2001 |
| 6230236 |
Content addressable memory system with cascaded memories and self timed signals |
May. 8, 2001 |
| 6230235 |
Address lookup DRAM aging |
May. 8, 2001 |
| 6230234 |
Direct logical block addressing flash memory mass storage architecture |
May. 8, 2001 |
| 6230233 |
Wear leveling techniques for flash EEPROM systems |
May. 8, 2001 |
| 6230232 |
Information processing system and true/false determining method used therefor |
May. 8, 2001 |
| 6230231 |
Hash equation for MAC addresses that supports cache entry tagging and virtual address tables |
May. 8, 2001 |
| 6230230 |
Elimination of traps and atomics in thread synchronization |
May. 8, 2001 |
| 6230229 |
Method and system for arbitrating path contention in a crossbar interconnect network |
May. 8, 2001 |
| 6230228 |
Efficient bridge architecture for handling multiple write transactions simultaneously |
May. 8, 2001 |
| 6230227 |
Computer system with support for a subtractive agent on the secondary side of a PCI-to-PCI bridg... |
May. 8, 2001 |
| 6230226 |
Compound device implementing hub and function endpoints on a single chip |
May. 8, 2001 |
| 6230225 |
Method and apparatus for multicasting on a bus |
May. 8, 2001 |
| 6230224 |
Fan-out expansion circuit for RS-485 multidrop connection |
May. 8, 2001 |
| 6230223 |
Dual purpose apparatus method and system for accelerated graphics or second memory interface |
May. 8, 2001 |
| 6230222 |
Prioritizing input device having a circuit indicating the highest priority key value when a plur... |
May. 8, 2001 |
| 6230221 |
Data storage system having a host computer coupled to bank of disk drives through interface comp... |
May. 8, 2001 |
| 6230220 |
Method for allocating either private or shared buffer memory for storing data from sort operatio... |
May. 8, 2001 |
| 6230219 |
High performance multichannel DMA controller for a PCI host bridge with a built-in cache |
May. 8, 2001 |
| 6230218 |
Apparatus for transferring execution of certain channel functions to a control unit and having m... |
May. 8, 2001 |
| 6230217 |
Data storage system having a host computer coupled to bank of disk drives through interface comp... |
May. 8, 2001 |
| 6230216 |
Method for eliminating dual address cycles in a peripheral component interconnect environment |
May. 8, 2001 |
