| Patent Number |
Title Of Patent |
Date Issued |
| 6711101 |
Segmented display and timepieces using same |
Mar. 23, 2004 |
| 6711100 |
Timepiece provided with a date having a large aperture |
Mar. 23, 2004 |
| 6711099 |
Setting and winding mechanism |
Mar. 23, 2004 |
| 6711098 |
Device displaying calendar date |
Mar. 23, 2004 |
| 6711097 |
Driving device for a hydroacoustic transmitter |
Mar. 23, 2004 |
| 6711096 |
Shaped piezoelectric composite array |
Mar. 23, 2004 |
| 6711095 |
Expenable/recoverable voice and data communications system buoy |
Mar. 23, 2004 |
| 6711094 |
Method and apparatus for active sonar detection enhancement |
Mar. 23, 2004 |
| 6711093 |
Reducing digit equilibrate current during self-refresh mode |
Mar. 23, 2004 |
| 6711092 |
Semiconductor memory with multiple timing loops |
Mar. 23, 2004 |
| 6711091 |
Indication of the system operation frequency to a DRAM during power-up |
Mar. 23, 2004 |
| 6711090 |
Semiconductor storage unit |
Mar. 23, 2004 |
| 6711089 |
Method and apparatus for performing signal synchronization |
Mar. 23, 2004 |
| 6711088 |
Semiconductor memory device |
Mar. 23, 2004 |
| 6711087 |
Limited swing driver circuit |
Mar. 23, 2004 |
| 6711086 |
Multiport semiconductor memory with different current-carrying capability between read ports and... |
Mar. 23, 2004 |
| 6711085 |
Digital memory circuit having a plurality of segmented memory areas |
Mar. 23, 2004 |
| 6711084 |
Semiconductor device capable of reliable power-on reset |
Mar. 23, 2004 |
| 6711083 |
High speed DRAM architecture with uniform access latency |
Mar. 23, 2004 |
| 6711082 |
Method and implementation of an on-chip self refresh feature |
Mar. 23, 2004 |
| 6711081 |
Refreshing of multi-port memory in integrated circuits |
Mar. 23, 2004 |
| 6711080 |
Evaluation circuit for reading out an information item stored in a memory cell |
Mar. 23, 2004 |
| 6711079 |
Data bus sense amplifier circuit |
Mar. 23, 2004 |
| 6711078 |
Writeback and refresh circuitry for direct sensed DRAM macro |
Mar. 23, 2004 |
| 6711077 |
Wafer burn-in test and wafer test circuit |
Mar. 23, 2004 |
| 6711076 |
Active restore weak write test mode |
Mar. 23, 2004 |
| 6711075 |
Semiconductor wafer, semiconductor chip, and manufacturing method of semiconductor device |
Mar. 23, 2004 |
| 6711074 |
Circuit and method for repairing column in semiconductor memory device |
Mar. 23, 2004 |
| 6711073 |
Active termination circuit and method for controlling the impedance of external integrated circu... |
Mar. 23, 2004 |
| 6711072 |
Digital memory circuit having a plurality of memory areas |
Mar. 23, 2004 |
| 6711071 |
Semiconductor device |
Mar. 23, 2004 |
| 6711070 |
Semiconductor memory device operating in synchronization with clock signal |
Mar. 23, 2004 |
| 6711069 |
Register having a ferromagnetic memory cells |
Mar. 23, 2004 |
| 6711068 |
Balanced load memory and method of operation |
Mar. 23, 2004 |
| 6711067 |
System and method for bit line sharing |
Mar. 23, 2004 |
| 6711066 |
Nonvolatile semiconductor memory |
Mar. 23, 2004 |
| 6711065 |
1 T flash memory recovery scheme for over-erasure |
Mar. 23, 2004 |
| 6711064 |
Single-poly EEPROM |
Mar. 23, 2004 |
| 6711063 |
EEPROM memory cell array architecture for substantially eliminating leakage current |
Mar. 23, 2004 |
| 6711062 |
Erase method of split gate flash memory reference cells |
Mar. 23, 2004 |
| 6711061 |
Non-volatile semiconductor memory device for selectively re-checking word lines |
Mar. 23, 2004 |
| 6711060 |
Non-volatile semiconductor memory and methods of driving, operating, and manufacturing this memo... |
Mar. 23, 2004 |
| 6711059 |
Memory controller |
Mar. 23, 2004 |
| 6711058 |
Erase method for nonvolatile semiconductor storage device and row decoder circuit for fulfilling... |
Mar. 23, 2004 |
| 6711057 |
Nonvolatile semiconductor memory device and method of retrieving faulty in the same |
Mar. 23, 2004 |
| 6711056 |
Memory with row redundancy |
Mar. 23, 2004 |
| 6711055 |
Nonvolatile semiconductor memory device of dual-operation type with data protection function |
Mar. 23, 2004 |
| 6711054 |
Semiconductor device, data processing system and a method for changing threshold of a non-volati... |
Mar. 23, 2004 |
| 6711053 |
Scaleable high performance magnetic random access memory cell and array |
Mar. 23, 2004 |
| 6711052 |
Memory having a precharge circuit and method therefor |
Mar. 23, 2004 |
