| Patent Number |
Title Of Patent |
Date Issued |
| 5394397 |
Shared buffer memory type ATM communication system and method with a broadcast facility |
Feb. 28, 1995 |
| 5394396 |
Supervision control system |
Feb. 28, 1995 |
| 5394395 |
Cell delay addition circuit |
Feb. 28, 1995 |
| 5394394 |
Message header classifier |
Feb. 28, 1995 |
| 5394393 |
Method for the routing of a packet of data in a digital transmission network |
Feb. 28, 1995 |
| 5394392 |
Method for transferring information using modems |
Feb. 28, 1995 |
| 5394391 |
Method of controlling the operation of a packet switched CDMA telecommunication network |
Feb. 28, 1995 |
| 5394390 |
FDDI network test adapter history store circuit (HSC) |
Feb. 28, 1995 |
| 5394389 |
Ring interworking between bidirectional line-switched ring transmission systems and path-switche... |
Feb. 28, 1995 |
| 5394388 |
Multiple microprobe arrays for recording and reproducing encoded information |
Feb. 28, 1995 |
| 5394387 |
Information recording/reproducing method |
Feb. 28, 1995 |
| 5394386 |
Optical disk high-speed search control device |
Feb. 28, 1995 |
| 5394385 |
Optical information recording/reproducing apparatus for performing positioning of recording/repr... |
Feb. 28, 1995 |
| 5394384 |
Reproducing method for excluding undesirable tunes by operating a single manipulator |
Feb. 28, 1995 |
| 5394383 |
Method of controlling reproduction finish of optical disc reproducing apparatus and the optical ... |
Feb. 28, 1995 |
| 5394382 |
Method for the organization of data on a CD-ROM |
Feb. 28, 1995 |
| 5394381 |
Optical pickup apparatus and magneto-optical reproducing system |
Feb. 28, 1995 |
| 5394380 |
Magneto-optic recording apparatus and method therefor |
Feb. 28, 1995 |
| 5394379 |
Hydrophone |
Feb. 28, 1995 |
| 5394378 |
Hydrophone transduction mechanism |
Feb. 28, 1995 |
| 5394377 |
Polarization insensitive hydrophone |
Feb. 28, 1995 |
| 5394376 |
Method and apparatus for acoustic attenuation |
Feb. 28, 1995 |
| 5394375 |
Row decoder for driving word line at a plurality of points thereof |
Feb. 28, 1995 |
| 5394374 |
Semiconductor memory with improved transfer gate drivers |
Feb. 28, 1995 |
| 5394373 |
Semiconductor memory having a high-speed address decoder |
Feb. 28, 1995 |
| 5394372 |
Semiconductor memory device having charge-pump system with improved oscillation means |
Feb. 28, 1995 |
| 5394371 |
Semiconductor memory device with shared sense amplifiers |
Feb. 28, 1995 |
| 5394370 |
High speed parallel test architecture |
Feb. 28, 1995 |
| 5394369 |
Semiconductor memory device incorporating redundancy memory cells having parallel test function |
Feb. 28, 1995 |
| 5394368 |
Semiconductor memory device |
Feb. 28, 1995 |
| 5394367 |
System and method for write-protecting predetermined portions of a memory array |
Feb. 28, 1995 |
| 5394366 |
Enabling data access of a unit of arbitrary number of bits of data in a semiconductor memory |
Feb. 28, 1995 |
| 5394365 |
Charge pump circuit having an improved charge pumping efficiency |
Feb. 28, 1995 |
| 5394364 |
High-speed memory readout circuit using a single set of data buffers |
Feb. 28, 1995 |
| 5394363 |
Pulse write driver circuit |
Feb. 28, 1995 |
| 5394362 |
Electrically alterable non-voltatile memory with N-bits per memory cell |
Feb. 28, 1995 |
| 5394361 |
Read/write memory |
Feb. 28, 1995 |
| 5394360 |
Non-volatile large capacity high speed memory with electron injection from a source into a float... |
Feb. 28, 1995 |
| 5394359 |
MOS integrated circuit with adjustable threshold voltage |
Feb. 28, 1995 |
| 5394358 |
SRAM memory cell with tri-level local interconnect |
Feb. 28, 1995 |
| 5394357 |
Non-volatile semiconductor memory device |
Feb. 28, 1995 |
| 5394356 |
Process for forming an FET read only memory device |
Feb. 28, 1995 |
| 5394355 |
Read only memory for storing multi-data |
Feb. 28, 1995 |
| 5394354 |
Semiconductor memory and its layout design |
Feb. 28, 1995 |
| 5394353 |
Flipflop and control circuit in a content addressable memory |
Feb. 28, 1995 |
| 5394352 |
Carry lookahead circuit for semiconductor integrated circuit |
Feb. 28, 1995 |
| 5394351 |
Optimized binary adder and comparator having an implicit constant for an input |
Feb. 28, 1995 |
| 5394350 |
Square computation circuit |
Feb. 28, 1995 |
| 5394349 |
Fast inverse discrete transform using subwords for decompression of information |
Feb. 28, 1995 |
| 5394348 |
Control system for semiconductor circuit testing system |
Feb. 28, 1995 |
