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Browse by Date |
| Patent Number |
Title Of Patent |
Date Issued |
| D393160 |
Display stand |
Apr. 7, 1998 |
| D393159 |
Adjustable plant holder |
Apr. 7, 1998 |
| D393158 |
Chair |
Apr. 7, 1998 |
| D393157 |
Chair |
Apr. 7, 1998 |
| D393156 |
Stuffed fabric applique |
Apr. 7, 1998 |
| D393155 |
Basket |
Apr. 7, 1998 |
| D393154 |
Barbed wire basket |
Apr. 7, 1998 |
| D393153 |
Wheeled molded luggage case |
Apr. 7, 1998 |
| D393152 |
Rod and reel accessory bag |
Apr. 7, 1998 |
| D393151 |
Track for storing fishhooks |
Apr. 7, 1998 |
| D393150 |
Wallet |
Apr. 7, 1998 |
| D393149 |
Wallet |
Apr. 7, 1998 |
| D393148 |
Key chain box |
Apr. 7, 1998 |
| D393147 |
Combined bow and pom-pom maker |
Apr. 7, 1998 |
| D393146 |
Shoe sole |
Apr. 7, 1998 |
| D393145 |
Shoe sole |
Apr. 7, 1998 |
| D393144 |
Sole for a shoe |
Apr. 7, 1998 |
| D393143 |
Shoe provided with a border |
Apr. 7, 1998 |
| D393142 |
Athletic shoe |
Apr. 7, 1998 |
| D393141 |
Work pants with kneeling pad pockets |
Apr. 7, 1998 |
| D393140 |
Patient gown |
Apr. 7, 1998 |
| D393139 |
Padded seatbelt shoulder harness sleeve with pocket |
Apr. 7, 1998 |
| D393138 |
Sleeve |
Apr. 7, 1998 |
| D393137 |
New image tie with mirror case |
Apr. 7, 1998 |
| D393136 |
Tortilla shell |
Apr. 7, 1998 |
| D393135 |
Baked item |
Apr. 7, 1998 |
| 5737769 |
Physical memory optimization using programmable virtual address buffer circuits to redirect addr... |
Apr. 7, 1998 |
| 5737768 |
Method and system for storing data blocks in a memory device |
Apr. 7, 1998 |
| 5737767 |
System for reconfiguring the width of an x-y RAM |
Apr. 7, 1998 |
| 5737766 |
Programmable gate array configuration memory which allows sharing with user memory |
Apr. 7, 1998 |
| 5737765 |
Electronic system with circuitry for selectively enabling access to configuration registers used... |
Apr. 7, 1998 |
| 5737764 |
Generation of memory column addresses using memory array type bits in a control register of a co... |
Apr. 7, 1998 |
| 5737763 |
Incremental disk backup |
Apr. 7, 1998 |
| 5737762 |
Data recording/reproducing system capable of processing servo process program at high speed |
Apr. 7, 1998 |
| 5737761 |
Memory control architecture for high-speed transfer operations |
Apr. 7, 1998 |
| 5737760 |
Microcontroller with security logic circuit which prevents reading of internal memory by externa... |
Apr. 7, 1998 |
| 5737759 |
Method and apparatus for maintaining cache coherency in a computer system with a highly pipeline... |
Apr. 7, 1998 |
| 5737758 |
Method and apparatus for maintaining cache coherency in a computer system with a highly pipeline... |
Apr. 7, 1998 |
| 5737757 |
Cache tag system for use with multiple processors including the most recently requested processo... |
Apr. 7, 1998 |
| 5737756 |
Dual bus computer network using dual busses with dual spy modules enabling clearing of invalidat... |
Apr. 7, 1998 |
| 5737755 |
System level mechanism for invalidating data stored in the external cache of a processor in a co... |
Apr. 7, 1998 |
| 5737754 |
Cache memory which selects one of several blocks to update by digitally combining control bits i... |
Apr. 7, 1998 |
| 5737753 |
Least recently used block replacement for four block cache logic system |
Apr. 7, 1998 |
| 5737752 |
Cache replacement mechanism |
Apr. 7, 1998 |
| 5737751 |
Cache memory management system having reduced reloads to a second level cache for enhanced memor... |
Apr. 7, 1998 |
| 5737750 |
Partitioned single array cache memory having first and second storage regions for storing non-br... |
Apr. 7, 1998 |
| 5737749 |
Method and system for dynamically sharing cache capacity in a microprocessor |
Apr. 7, 1998 |
| 5737748 |
Microprocessor unit having a first level write-through cache memory and a smaller second-level w... |
Apr. 7, 1998 |
| 5737747 |
Prefetching to service multiple video streams from an integrated cached disk array |
Apr. 7, 1998 |
| 5737746 |
Computer system including an apparatus for reducing power consumption in an on-chip tag static R... |
Apr. 7, 1998 |
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