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Class Information
Number: 716/14
Name: Data processing: design and analysis of circuit or semiconductor mask > Circuit design > Routing (e.g., routing map, netlisting) > Detailed routing (e.g., channel routing, switch box routing)
Description: Subject matter comprising means or steps for determining the wiring route within a specified circuit region.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7624367 |
Method and system for routing |
Nov. 24, 2009 |
| 7620923 |
Run-time efficient methods for routing large multi-fanout nets |
Nov. 17, 2009 |
| 7614027 |
Methods for forming a MRAM with non-orthogonal wiring |
Nov. 3, 2009 |
| 7603644 |
Integrated circuit routing and compaction |
Oct. 13, 2009 |
| 7603599 |
Method to test routed networks |
Oct. 13, 2009 |
| 7603642 |
Placer with wires for RF and analog design |
Oct. 13, 2009 |
| 7600209 |
Generating constraint preserving testcases in the presence of dead-end constraints |
Oct. 6, 2009 |
| 7596774 |
Hard macro with configurable side input/output terminals, for a subsystem |
Sep. 29, 2009 |
| 7594196 |
Block interstitching using local preferred direction architectures, tools, and apparatus |
Sep. 22, 2009 |
| 7594215 |
Method and system for optimized automated IC package pin routing |
Sep. 22, 2009 |
| 7590959 |
Layout system, layout program, and layout method for text or other layout elements along a grid |
Sep. 15, 2009 |
| 7587696 |
Semiconductor device, layout method and apparatus and program |
Sep. 8, 2009 |
| 7581198 |
Method and system for the modular design and layout of integrated circuits |
Aug. 25, 2009 |
| 7581200 |
System and method for analyzing length differences in differential signal paths |
Aug. 25, 2009 |
| 7576569 |
Circuit for dynamic circuit timing synthesis and monitoring of critical paths and environmental conditions of an integrated circuit |
Aug. 18, 2009 |
| 7577933 |
Timing driven pin assignment |
Aug. 18, 2009 |
| 7574686 |
Method and system for implementing deterministic multi-processing |
Aug. 11, 2009 |
| 7571409 |
Circuit design device and circuit design program |
Aug. 4, 2009 |
| 7571412 |
Method and system for semiconductor device characterization pattern generation and analysis |
Aug. 4, 2009 |
| 7568177 |
System and method for power gating of an integrated circuit |
Jul. 28, 2009 |
| 7568178 |
System simulation and graphical data flow programming in a common environment using wire data flow |
Jul. 28, 2009 |
| 7562331 |
Netlist synthesis and automatic generation of PC board schematics |
Jul. 14, 2009 |
| 7562330 |
Budgeting global constraints on local constraints in an autorouter |
Jul. 14, 2009 |
| 7562329 |
Master-slice-type semiconductor integrated circuit having a bulk layer and a plurality of wiring layers and a design method therefor |
Jul. 14, 2009 |
| 7555738 |
Integrated structure layout and layout of interconnections for an instruction execution unit of an integrated circuit chip |
Jun. 30, 2009 |
| 7546569 |
Automatic trace determination method |
Jun. 9, 2009 |
| 7543251 |
Method and apparatus replacing sub-networks within an IC design |
Jun. 2, 2009 |
| 7543252 |
Migration of integrated circuit layout for alternating phase shift masks |
Jun. 2, 2009 |
| 7539893 |
Systems and methods for speed binning of integrated circuits |
May. 26, 2009 |
| 7536665 |
User-guided autorouting |
May. 19, 2009 |
| 7536666 |
Integrated circuit and method of routing a clock signal in an integrated circuit |
May. 19, 2009 |
| 7536667 |
Method of semiconductor device and design supporting system of semiconductor device |
May. 19, 2009 |
| 7533361 |
System and process for manufacturing custom electronics by combining traditional electronics with printable electronics |
May. 12, 2009 |
| 7533358 |
Integrated sizing, layout, and extractor tool for circuit design |
May. 12, 2009 |
| 7530041 |
System and method for auto-routing jog elimination |
May. 5, 2009 |
| 7530042 |
System and method for auto-routing jog elimination |
May. 5, 2009 |
| 7523424 |
Method and system for representing analog connectivity in hardware description language designs |
Apr. 21, 2009 |
| 7516433 |
Non-orthogonal structures and space tiles for layout, placement, and routing of an integrated circuit |
Apr. 7, 2009 |
| 7512921 |
Method and apparatus for designing integrated circuit enabling the yield of integrated circuit to be improved by considering random errors |
Mar. 31, 2009 |
| 7509615 |
Circuit layout structure and method |
Mar. 24, 2009 |
| 7509616 |
Integrated circuit layout design system, and method thereof, and program |
Mar. 24, 2009 |
| 7506289 |
Approach for routing an integrated circuit |
Mar. 17, 2009 |
| 7503026 |
Cell, standard cell, standard cell library, a placement method using standard cell, and a semiconductor integrated circuit |
Mar. 10, 2009 |
| 7500210 |
Chip area optimization for multithreaded designs |
Mar. 3, 2009 |
| 7500212 |
Method, apparatus and program for automatically routing semiconductor integrated circuit |
Mar. 3, 2009 |
| 7496874 |
Semiconductor yield estimation |
Feb. 24, 2009 |
| 7496878 |
Automatic wiring method and apparatus for semiconductor package and automatic identifying method and apparatus for semiconductor package |
Feb. 24, 2009 |
| 7490309 |
Method and system for automatically optimizing physical implementation of an electronic circuit responsive to simulation analysis |
Feb. 10, 2009 |
| 7487488 |
Predictable repeater routing in an integrated circuit design |
Feb. 3, 2009 |
| 7480888 |
Design structure for facilitating engineering changes in integrated circuits |
Jan. 20, 2009 |
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