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Class Information
Number: 716/13
Name: Data processing: design and analysis of circuit or semiconductor mask > Circuit design > Routing (e.g., routing map, netlisting) > Global routing (e.g., shortest path, dead space, or duplicate trace elimination)
Description: Subject matter comprising means or steps for evaluating or determining the shortest interconnection paths or minimizing the number of channels required for placing the conductor paths between nets.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7622779 |
Interconnection architecture and method of assessing interconnection architecture |
Nov. 24, 2009 |
| 7624367 |
Method and system for routing |
Nov. 24, 2009 |
| 7620923 |
Run-time efficient methods for routing large multi-fanout nets |
Nov. 17, 2009 |
| 7614027 |
Methods for forming a MRAM with non-orthogonal wiring |
Nov. 3, 2009 |
| 7614025 |
Method of placement for iterative implementation flows |
Nov. 3, 2009 |
| 7614028 |
Representation, configuration, and reconfiguration of routing method and system |
Nov. 3, 2009 |
| 7603644 |
Integrated circuit routing and compaction |
Oct. 13, 2009 |
| 7603599 |
Method to test routed networks |
Oct. 13, 2009 |
| 7599385 |
Method and apparatus for providing composite link assignment in network design |
Oct. 6, 2009 |
| 7594215 |
Method and system for optimized automated IC package pin routing |
Sep. 22, 2009 |
| 7594201 |
Enhanced method of optimizing multiplex structures and multiplex control structures in RTL code |
Sep. 22, 2009 |
| 7594196 |
Block interstitching using local preferred direction architectures, tools, and apparatus |
Sep. 22, 2009 |
| 7593341 |
Method and apparatus for updating a shortest path graph |
Sep. 22, 2009 |
| 7590964 |
Method and system for automatic generation of processor datapaths using instruction set architecture implementing means |
Sep. 15, 2009 |
| 7581198 |
Method and system for the modular design and layout of integrated circuits |
Aug. 25, 2009 |
| 7577933 |
Timing driven pin assignment |
Aug. 18, 2009 |
| 7574687 |
Method and system to optimize timing margin in a system in package module |
Aug. 11, 2009 |
| 7571415 |
Layout of power device |
Aug. 4, 2009 |
| 7571412 |
Method and system for semiconductor device characterization pattern generation and analysis |
Aug. 4, 2009 |
| 7571411 |
Methods and apparatus for providing flexible timing-driven routing trees |
Aug. 4, 2009 |
| 7571410 |
Resonant tree driven clock distribution grid |
Aug. 4, 2009 |
| 7568177 |
System and method for power gating of an integrated circuit |
Jul. 28, 2009 |
| 7562330 |
Budgeting global constraints on local constraints in an autorouter |
Jul. 14, 2009 |
| 7562329 |
Master-slice-type semiconductor integrated circuit having a bulk layer and a plurality of wiring layers and a design method therefor |
Jul. 14, 2009 |
| 7559041 |
Method and apparatus for designing semiconductor integrated circuit |
Jul. 7, 2009 |
| 7552404 |
Semiconductor integrated device and apparatus for designing the same |
Jun. 23, 2009 |
| 7546569 |
Automatic trace determination method |
Jun. 9, 2009 |
| 7543249 |
Embedded switchable power ring |
Jun. 2, 2009 |
| 7543263 |
Automatic trace shaping method |
Jun. 2, 2009 |
| 7536665 |
User-guided autorouting |
May. 19, 2009 |
| 7536666 |
Integrated circuit and method of routing a clock signal in an integrated circuit |
May. 19, 2009 |
| 7536667 |
Method of semiconductor device and design supporting system of semiconductor device |
May. 19, 2009 |
| 7533358 |
Integrated sizing, layout, and extractor tool for circuit design |
May. 12, 2009 |
| 7533361 |
System and process for manufacturing custom electronics by combining traditional electronics with printable electronics |
May. 12, 2009 |
| 7530040 |
Automatically routing nets according to current density rules |
May. 5, 2009 |
| 7530041 |
System and method for auto-routing jog elimination |
May. 5, 2009 |
| 7530042 |
System and method for auto-routing jog elimination |
May. 5, 2009 |
| 7526744 |
Integrated circuit design method for efficiently generating mask data |
Apr. 28, 2009 |
| 7526741 |
Microfluidic design automation method and system |
Apr. 28, 2009 |
| 7526743 |
Method for routing data paths in a semiconductor chip with a plurality of layers |
Apr. 28, 2009 |
| 7523424 |
Method and system for representing analog connectivity in hardware description language designs |
Apr. 21, 2009 |
| 7523436 |
Semi-custom-made semiconductor integrated circuit device, method for customization and method for redesign |
Apr. 21, 2009 |
| 7516433 |
Non-orthogonal structures and space tiles for layout, placement, and routing of an integrated circuit |
Apr. 7, 2009 |
| 7516437 |
Skew-driven routing for networks |
Apr. 7, 2009 |
| 7512907 |
Generating rules for nets that cross package boundaries |
Mar. 31, 2009 |
| 7509616 |
Integrated circuit layout design system, and method thereof, and program |
Mar. 24, 2009 |
| 7509615 |
Circuit layout structure and method |
Mar. 24, 2009 |
| 7506289 |
Approach for routing an integrated circuit |
Mar. 17, 2009 |
| 7500210 |
Chip area optimization for multithreaded designs |
Mar. 3, 2009 |
| 7500212 |
Method, apparatus and program for automatically routing semiconductor integrated circuit |
Mar. 3, 2009 |
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