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Class Information
Number: 716/1
Name: Data processing: design and analysis of circuit or semiconductor mask > Circuit design
Description: Subject matter comprising means or steps for sketching or outlining of layout of circuit components.

Sub-classes under this class:

Class Number Class Name Patents
716/8 Floorplanning 1,110
716/18 Logical circuit synthesizer 1,512
716/2 Optimization (e.g., redundancy, compaction) 1,701
716/7 Partitioning (e.g., function block, ordering constraint) 739
716/17 Programmable integrated circuit (e.g., basic cell, standard cell, macrocell) 973
716/12 Routing (e.g., routing map, netlisting) 1,253
716/4 Testing or evaluating 3,069
716/3 Translation (e.g., conversion, equivalence) 811

Patents under this class:

Patent Number Title Of Patent Date Issued
7805698 Methods and systems for physical hierarchy configuration engine and graphical editor Sep. 28, 2010
7805697 Rotary clock synchronous fabric Sep. 28, 2010
7805688 Memory construction apparatus for forming logical memory space Sep. 28, 2010
7805687 One-time programmable (OTP) memory cell Sep. 28, 2010
7805686 Methods to generate state space models by closed forms for general interconnect and transmission lines, trees and nets, and their model reduction and simulations Sep. 28, 2010
7802223 Method and system for configurable contacts for implementing different bias designs of an integrated circuit device Sep. 21, 2010
7802222 Generalized constraint collection management method Sep. 21, 2010
7802221 Design tool with graphical interconnect matrix Sep. 21, 2010
7802219 Flat placement of cells on non-integer multiple height rows in a digital integrated circuit layout Sep. 21, 2010
7802217 Leakage power optimization considering gate input activity and timing slack Sep. 21, 2010
7802213 Method and apparatus for circuit design and retiming Sep. 21, 2010
7802211 Method and device for verifying digital circuits Sep. 21, 2010
7802209 Method for reducing timing libraries for intra-die model in statistical static timing analysis Sep. 21, 2010
7802208 Design automation using spine routing Sep. 21, 2010
7801699 Regression test modules for detecting and reporting changes in process design kits Sep. 21, 2010
7797667 Hardware acceleration of functional factoring Sep. 14, 2010
7797663 Conductive dome probes for measuring system level multi-GHZ signals Sep. 14, 2010
7797661 Method and apparatus for describing and managing properties of a transformer coil Sep. 14, 2010
7797659 Analog/digital partitioning of circuit designs for simulation Sep. 14, 2010
7797651 Verifying design isolation using bitstreams Sep. 14, 2010
7797646 Method for using mixed multi-Vt devices in a cell-based design Sep. 14, 2010
7797068 Defect probability calculating method and semiconductor device manufacturing method Sep. 14, 2010
RE41704 Timing signal generation for charge-coupled device Sep. 14, 2010
7793247 Method and apparatus for directed physical implementation of a circuit design for an integrated circuit Sep. 7, 2010
7793245 Statistical iterative timing analysis of circuits having latches and/or feedback loops Sep. 7, 2010
7793243 Multi-engine static analysis Sep. 7, 2010
7793235 Method and circuit for matching semiconductor device behavior Sep. 7, 2010
7793119 Adaptive voltage scaling with age compensation Sep. 7, 2010
7788630 Method and apparatus for determining an optical model that models the effect of optical proximity correction Aug. 31, 2010
7788625 Method and apparatus for precharacterizing systems for use in system level design of integrated circuits Aug. 31, 2010
7788617 Method of modeling and employing the CMOS gate slew and output load dependent pin capacitance during timing analysis Aug. 31, 2010
7788612 System, method, and computer program product for matching cell layout of an integrated circuit design Aug. 31, 2010
7788610 Random stimuli generation of memory maps and memory allocations Aug. 31, 2010
7788609 Method and apparatus for optimizing an optical proximity correction model Aug. 31, 2010
7788608 Microbump function assignment in a buck converter Aug. 31, 2010
7788079 Methods for producing equivalent circuit models of multi-layer circuits and apparatus using the same Aug. 31, 2010
7784016 Method and system for context-specific mask writing Aug. 24, 2010
7784015 Method for generating a mask layout and constructing an integrated circuit Aug. 24, 2010
7784013 Method for the definition of a library of application-domain-specific logic cells Aug. 24, 2010
7784009 Electrically programmable .pi.-shaped fuse structures and design process therefore Aug. 24, 2010
7784008 Performance visualization system Aug. 24, 2010
7784005 Electronic circuit design viewer Aug. 24, 2010
7784001 Circuit design method, circuit design system, and program product for causing computer to perform circuit design Aug. 24, 2010
7784000 Identifying sequential functional paths for IC testing methods and system Aug. 24, 2010
7783999 Electrical parameter extraction for integrated circuit design Aug. 24, 2010
7783995 System and method for circuit design scaling Aug. 24, 2010
7783994 Method for providing secure and trusted ASICs using 3D integration Aug. 24, 2010
7783467 Method for digital system modeling by using higher software simulator Aug. 24, 2010
RE41548 FPGA with hybrid interconnect Aug. 17, 2010
7779381 Test generation for low power circuits Aug. 17, 2010

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