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Class Information
Number: 716
Name: Data processing: design and analysis of circuit or semiconductor mask >
Description: GENERAL STATEMENT OF THE CLASS SUBJECT MATTER










Class Number Class Name No. of Patents
 

Applications (364/400)

 
716/1

Circuit design

1972
716/8

Floorplanning

1110
716/10

Constraint-based placement (e.g., critical block assignment, delay limits, wiring capacitance)

1277
716/9

Detailed placement (i.e., iterative improvement)

775
716/11

Layout editor (e.g., updating)

1167
716/18

Logical circuit synthesizer

1512
716/2

Optimization (e.g., redundancy, compaction)

1701
716/7

Partitioning (e.g., function block, ordering constraint)

739
716/17

Programmable integrated circuit (e.g., basic cell, standard cell, macrocell)

973
716/12

Routing (e.g., routing map, netlisting)

1253
716/14

Detailed routing (e.g., channel routing, switch box routing)

665
716/13

Global routing (e.g., shortest path, dead space, or duplicate trace elimination)

734
716/15

Pcb wiring

332
716/16

Pla, pld, fpga, or mcm

1033
716/4

Testing or evaluating

3069
716/5

Design verification (e.g., wiring line capacitance, fan-out checking, minimum path width)

2521
716/6

Timing analysis (e.g., delay time, path delay, latch timing)

1929
716/3

Translation (e.g., conversion, equivalence)

811
716/19

Design of semiconductor mask

1426
716/20

Mesh generation

436
716/21

Pattern exposure

1095
 
 
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