Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Browse by Category: Main > Information Technology
Class Information
Number: 714/800
Name: Error detection/correction and fault detection/recovery > Pulse or data error handling > Error/fault detection technique > Parity bit
Description: Subject matter in which a redundant bit is added to a block of data bits.










Sub-classes under this class:

Class Number Class Name Patents
714/802 Even and odd parity 76
714/801 Parity generator or checker circuit detail 450
714/803 Parity prediction 49
714/804 Plural dimension parity check 161
714/805 Storage accessing (e.g., address parity check) 432


Patents under this class:
1 2 3 4 5 6 7 8 9 10 11 12 13

Patent Number Title Of Patent Date Issued
5881076 Comparator utilizing redundancy Mar. 9, 1999
5881077 Data processing system Mar. 9, 1999
5878061 Providing serial data clock signal transitions with parity bits Mar. 2, 1999
5875295 Instruction format for ensuring safe execution of display list Feb. 23, 1999
5875201 Second level cache having instruction cache parity error control Feb. 23, 1999
5872780 Sonet data transfer protocol between facility interfaces and cross-connect Feb. 16, 1999
5872802 Parity generation and check circuit and method in read data path Feb. 16, 1999
5864655 Managing removable media in raid and rail environments Jan. 26, 1999
5862158 Efficient method for providing fault tolerance against double device failures in multiple device systems Jan. 19, 1999
5856980 Baseband encoding method and apparatus for increasing the transmission rate over a communication medium Jan. 5, 1999
5844924 Main signal memory supervisory control system using odd-even alternative check Dec. 1, 1998
5838698 Alignment of parity bits to eliminate errors in switching from an active to a standby processing circuit Nov. 17, 1998
5835483 Information transmission system utilizing at least two channels in the redundancy mode Nov. 10, 1998
5835511 Method and mechanism for checking integrity of byte enable signals Nov. 10, 1998
5796758 Self-checking content-addressable memory and method of operation for detecting multiple selected word lines Aug. 18, 1998
5793841 Apparatus and method for receiving dual highway data in electronic switching system Aug. 11, 1998
5787101 Smart card message transfer without microprocessor intervention Jul. 28, 1998
5784394 Method and system for implementing parity error recovery schemes in a data processing system Jul. 21, 1998
5784393 Method and apparatus for providing fault detection to a bus within a computer system Jul. 21, 1998
5781564 Method and apparatus for detecting and concealing data errors in stored digital data Jul. 14, 1998
5781920 Data storage apparatus having data and parity media Jul. 14, 1998
5771247 Low latency error reporting for high performance bus Jun. 23, 1998
5768630 Apparatus for receiving and transmitting a serial data Jun. 16, 1998
5768319 GPS data collection in high noise-to-signal ratio environments Jun. 16, 1998
5768300 Interconnect fault detection and localization method and apparatus Jun. 16, 1998
5768299 Derived generation system for parity bits with bi-directional, crossed-fields utilizing stored flip-bit feature Jun. 16, 1998
5761465 System for coupling asynchronous data path to field check circuit of synchronous data path when the asynchronous data path communicating data in synchronous format Jun. 2, 1998
5751744 Error detection and correction circuit May. 12, 1998
5748651 Optimum utilization of pseudorange and range rate corrections by SATPS receiver May. 5, 1998
5721747 Method and device for data transmission having improved error resilience with concomitant integrity protection Feb. 24, 1998
5719817 Memory array using selective device activation Feb. 17, 1998
5712862 Error detection system for digital data transmission multiplexing system Jan. 27, 1998
5701315 Method and device for protecting the execution of linear sequences of commands performed by a processor Dec. 23, 1997
5689634 Three purpose shadow register attached to the output of storage devices Nov. 18, 1997
5680579 Redundant array of solid state memory devices Oct. 21, 1997
5661735 FDIC method for minimizing measuring failures in a measuring system comprising redundant sensors Aug. 26, 1997
5644695 Array combinatorial decoding with multiple error and erasure detection and location using cyclic equivalence testing Jul. 1, 1997
5640506 Integrity protection for parity calculation for raid parity cache Jun. 17, 1997
5634033 Disk array storage system architecture for parity operations simultaneous with other data operations May. 27, 1997
5615297 Transmission system for coded speech signals and/or voiceband data Mar. 25, 1997
5612965 Multiple memory bit/chip failure detection Mar. 18, 1997
5608741 Fast parity generator using complement pass-transistor logic Mar. 4, 1997
5596565 Method and apparatus for recording MPEG-compressed video data and compressed audio data on a disk Jan. 21, 1997
5592450 Method for reproducing compressed information data from a disk using a spatial frequency less than the track pitch Jan. 7, 1997
5590139 Method of recording a compressed motion picture signal in which effects of rounding errors resulting from inversely transforming transaction coefficients representing are mitigated Dec. 31, 1996
5581567 Dual level error detection and correction employing data subsets from previously corrected data Dec. 3, 1996
5581566 High-performance parallel interface to synchronous optical network gateway Dec. 3, 1996
5577055 Method and circuit device to control a memory Nov. 19, 1996
5566122 Memory array using selective device activation Oct. 15, 1996
5557622 Method and apparatus for parity generation Sep. 17, 1996

1 2 3 4 5 6 7 8 9 10 11 12 13










 
 
  Recently Added Patents
Lateral flow test kit and method for detecting an analyte
Polar nematic compounds
Plants and seeds of hybrid corn variety CH089600
Synthetic refrigeration oil composition for HFC applications
High-density 3-dimensional structure
Methods and system for displaying segmented images
Erasing a non-volatile memory (NVM) system having error correction code (ECC)
  Randomly Featured Patents
Insulative electrical connector cover for z-shaped connector
Liquid elastic membrane prism and 3 dimension display device having the same
Image coding and decoding methods, image coding and decoding apparatuses, and recording media for image coding and decoding programs
Register file with separate registers for compiler code and low level code
Durable outsole for article of footwear
Enhancement of in situ microbial remediation of aquifers
Water press
Elevator with belt-like transmission means, particularly with wedge-ribbed belt, as support means and/or drive means
Video special effects with cascaded control logic
Motorcycle fluid line cover