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Class Information
Number: 714/798
Name: Error detection/correction and fault detection/recovery > Pulse or data error handling > Error detection for synchronization control
Description: Subject matter in which error detecting techniques are utilized to detect an out-of-synch condition or to control synchronization between devices.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7613990 |
Method and system for a multi-channel add-compare-select unit |
Nov. 3, 2009 |
| 7610520 |
Digital data signal testing using arbitrary test signal |
Oct. 27, 2009 |
| 7603596 |
Memory device capable of detecting its failure |
Oct. 13, 2009 |
| 7581161 |
Method and system for widening the synchronization range for a discrete multitone multicarrier single pilot tone system |
Aug. 25, 2009 |
| 7562277 |
Data transmitting/receiving system and method thereof |
Jul. 14, 2009 |
| 7546513 |
Circuit and method for checking and recovering a disk array |
Jun. 9, 2009 |
| 7526704 |
Testing system and method allowing adjustment of signal transmit timing |
Apr. 28, 2009 |
| 7523365 |
Dynamic determination of signal quality in a digital system |
Apr. 21, 2009 |
| 7516379 |
Circuit and method for comparing circuit performance between functional and AC scan testing in an integrated circuit (IC) |
Apr. 7, 2009 |
| 7512868 |
Method for processing a signal using an approximate map algorithm and corresponding uses |
Mar. 31, 2009 |
| 7506240 |
Method and apparatus for image processing |
Mar. 17, 2009 |
| 7500156 |
Method and apparatus for verifying multi-channel data |
Mar. 3, 2009 |
| 7484163 |
Information recording/reproducing apparatus, and information recording medium |
Jan. 27, 2009 |
| 7484164 |
Information recording/reproducing apparatus, and information recording medium |
Jan. 27, 2009 |
| 7484166 |
Semiconductor integrated circuit verification method and test pattern preparation method |
Jan. 27, 2009 |
| 7480853 |
Deleting objects from a store of a device |
Jan. 20, 2009 |
| 7480849 |
Information recording/reproducing apparatus, and information recording medium |
Jan. 20, 2009 |
| 7475319 |
Threshold voltage control apparatus, test apparatus, and circuit device |
Jan. 6, 2009 |
| 7472336 |
Data detector and multi-channel data detector |
Dec. 30, 2008 |
| 7467335 |
Method and apparatus for synchronizing data channels using an alternating parity deskew channel |
Dec. 16, 2008 |
| 7461326 |
Information processing method capable of detecting redundant circuits and displaying redundant circuits in the circuit design process |
Dec. 2, 2008 |
| 7461317 |
System and method for aligning a quadrature encoder and establishing a decoder processing speed |
Dec. 2, 2008 |
| 7454514 |
Processing data with uncertain arrival time |
Nov. 18, 2008 |
| 7447976 |
Data transfer apparatus |
Nov. 4, 2008 |
| 7444275 |
Multi-variable polynomial modeling techniques for use in integrated circuit design |
Oct. 28, 2008 |
| 7437656 |
Error correction of balanced codeword sequence |
Oct. 14, 2008 |
| 7428283 |
Data recovery algorithm using data position detection and serial data receiver adopting the same |
Sep. 23, 2008 |
| 7424307 |
Loss of page synchronization |
Sep. 9, 2008 |
| 7418650 |
Method for temporal synchronization of clocks |
Aug. 26, 2008 |
| 7409631 |
Error-detection flip-flop |
Aug. 5, 2008 |
| 7406652 |
Method and circuit for reducing SATA transmission data errors by adjusting the period of sending ALIGN primitives |
Jul. 29, 2008 |
| 7404115 |
Self-synchronising bit error analyser and circuit |
Jul. 22, 2008 |
| 7370256 |
Integrated circuit testing module including data compression |
May. 6, 2008 |
| 7370247 |
Dynamic offset compensation based on false transitions |
May. 6, 2008 |
| 7370239 |
Input/output device with configuration, fault isolation and redundant fault assist functionality |
May. 6, 2008 |
| 7366477 |
Redundancy version implementation for an uplink enhanced dedicated channel |
Apr. 29, 2008 |
| 7363431 |
Message-based distributed synchronization in a storage system |
Apr. 22, 2008 |
| 7359367 |
Device for preventing erroneous synchronization in wireless communication apparatus |
Apr. 15, 2008 |
| 7356756 |
Serial communications data path with optional features |
Apr. 8, 2008 |
| 7340656 |
Method and apparatus for probing a computer bus |
Mar. 4, 2008 |
| 7330993 |
Slew rate control mechanism |
Feb. 12, 2008 |
| 7328396 |
Cyclic redundancy check generating circuit |
Feb. 5, 2008 |
| 7308620 |
Method to obtain the worst case transmit data and jitter pattern that minimizes the receiver's data eye for arbitrary channel model |
Dec. 11, 2007 |
| 7296101 |
Method and system for using a patch module to process non-posted request cycles and to control completions returned to requesting device |
Nov. 13, 2007 |
| 7296170 |
Clock controller with clock source fail-safe logic |
Nov. 13, 2007 |
| 7292668 |
Data processor and data processing method |
Nov. 6, 2007 |
| 7293214 |
Testable design methodology for clock domain crossing |
Nov. 6, 2007 |
| 7290201 |
Scheme for eliminating the effects of duty cycle asymmetry in clock-forwarded double data rate interface applications |
Oct. 30, 2007 |
| 7287200 |
Jitter applying circuit and test apparatus |
Oct. 23, 2007 |
| 7284169 |
System and method for testing write strobe timing margins in memory devices |
Oct. 16, 2007 |
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