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Class Information
Number: 714/724
Name: Error detection/correction and fault detection/recovery > Pulse or data error handling > Digital logic testing
Description: Subject matter in which the diagnostic test is performed upon a system or element performing a binary logic operation upon a signal having plural distinct discrete states.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7093174 |
Tester channel count reduction using observe logic and pattern generator |
Aug. 15, 2006 |
| 7088122 |
Test arrangement for testing semiconductor circuit chips |
Aug. 8, 2006 |
| 7088998 |
Method and product palette for testing electronic products |
Aug. 8, 2006 |
| 7089466 |
Instrumentation system having a reconfigurable instrumentation card with programmable logic and a modular daughter card |
Aug. 8, 2006 |
| 7089467 |
Asynchronous debug interface |
Aug. 8, 2006 |
| 7085977 |
Method and system for detecting an outlying resistance in a plurality of resistive elements |
Aug. 1, 2006 |
| 7082558 |
Increasing possible test patterns which can be used with sequential scanning techniques to perform speed analysis |
Jul. 25, 2006 |
| 7078929 |
Interface controller using JTAG scan chain |
Jul. 18, 2006 |
| 7080298 |
Circuit apparatus and method for testing integrated circuits using weighted pseudo-random test patterns |
Jul. 18, 2006 |
| 7080302 |
Semiconductor device and test system therefor |
Jul. 18, 2006 |
| 7076705 |
Semiconductor integrated circuit having bonding optional function |
Jul. 11, 2006 |
| 7073102 |
Reconfiguration device for faulty memory |
Jul. 4, 2006 |
| 7073107 |
Adaptive defect based testing |
Jul. 4, 2006 |
| 7073108 |
Communications jacks including test circuits and related circuits and methods |
Jul. 4, 2006 |
| 7073109 |
Method and system for graphical pin assignment and/or verification |
Jul. 4, 2006 |
| 7069376 |
Flexibility of use of a data processing apparatus |
Jun. 27, 2006 |
| 7065690 |
Fault detecting method and layout method for semiconductor integrated circuit |
Jun. 20, 2006 |
| 7062690 |
System for testing fast synchronous digital circuits, particularly semiconductor memory chips |
Jun. 13, 2006 |
| 7062691 |
Method and apparatus for displaying test results and recording medium |
Jun. 13, 2006 |
| 7058865 |
Apparatus for testing semiconductor integrated circuit |
Jun. 6, 2006 |
| 7055060 |
On-die mechanism for high-reliability processor |
May. 30, 2006 |
| 7047174 |
Method for producing test patterns for testing an integrated circuit |
May. 16, 2006 |
| 7047462 |
Method and apparatus for providing JTAG functionality in a remote server management controller |
May. 16, 2006 |
| 7047463 |
Method and system for automatically determining a testing order when executing a test flow |
May. 16, 2006 |
| 7043674 |
Systems and methods for facilitating testing of pads of integrated circuits |
May. 9, 2006 |
| 7039838 |
Method for testing a circuit unit to be tested and test apparatus |
May. 2, 2006 |
| 7039839 |
Method and apparatus for enhanced parallel port JTAG interface |
May. 2, 2006 |
| 7039840 |
Method and apparatus for high update rate integrated circuit boundary scan |
May. 2, 2006 |
| 7039841 |
Tester system having multiple instruction memories |
May. 2, 2006 |
| 7039845 |
Method and apparatus for deriving a bounded set of path delay test patterns covering all transition faults |
May. 2, 2006 |
| 7034560 |
Device and method for testing integrated circuit dice in an integrated circuit module |
Apr. 25, 2006 |
| 7035755 |
Circuit testing with ring-connected test instrument modules |
Apr. 25, 2006 |
| 7036058 |
Semiconductor device having integrally sealed integrated circuit chips arranged for improved testing |
Apr. 25, 2006 |
| 7032145 |
System for dynamic re-allocation of test pattern data for parallel and serial test data patterns |
Apr. 18, 2006 |
| 7032146 |
Boundary scan apparatus and interconnect test method |
Apr. 18, 2006 |
| 7032147 |
Boundary scan circuit |
Apr. 18, 2006 |
| 7028237 |
Internal bus testing device and method |
Apr. 11, 2006 |
| 7024328 |
Systems and methods for non-intrusive testing of signals between circuits |
Apr. 4, 2006 |
| 7024551 |
Method and apparatus for updating boot code using a system controller |
Apr. 4, 2006 |
| 7024601 |
DVI link with circuit and method for test |
Apr. 4, 2006 |
| 7020571 |
Automated test method |
Mar. 28, 2006 |
| 7020573 |
Enhanced testing for compliance with universal plug and play protocols |
Mar. 28, 2006 |
| 7020582 |
Methods and apparatus for laser marking of integrated circuit faults |
Mar. 28, 2006 |
| 7020813 |
On chip debugging method of microcontrollers |
Mar. 28, 2006 |
| 7020817 |
Method for testing semiconductor chips and semiconductor device |
Mar. 28, 2006 |
| 7020818 |
Method and apparatus for PVT controller for programmable on die termination |
Mar. 28, 2006 |
| 7017091 |
Test system formatters configurable for multiple data rates |
Mar. 21, 2006 |
| 7017092 |
On-chip design for monitor |
Mar. 21, 2006 |
| 7017093 |
Circuit and/or method for automated use of unallocated resources for a trace buffer application |
Mar. 21, 2006 |
| 7017094 |
Performance built-in self test system for a device and a method of use |
Mar. 21, 2006 |
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