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Class Information
Number: 714/724
Name: Error detection/correction and fault detection/recovery > Pulse or data error handling > Digital logic testing
Description: Subject matter in which the diagnostic test is performed upon a system or element performing a binary logic operation upon a signal having plural distinct discrete states.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7620861 |
Method and apparatus for testing integrated circuits by employing test vector patterns that satisfy passband requirements imposed by communication channels |
Nov. 17, 2009 |
| 7620858 |
Fabric-based high speed serial crossbar switch for ATE |
Nov. 17, 2009 |
| 7617431 |
Method and apparatus for analyzing delay defect |
Nov. 10, 2009 |
| 7617428 |
Circuits and associated methods for improved debug and test of an application integrated circuit |
Nov. 10, 2009 |
| 7617427 |
Method and apparatus for detecting defects in integrated circuit die from stimulation of statistical outlier signatures |
Nov. 10, 2009 |
| 7613974 |
Fault detection method and apparatus |
Nov. 3, 2009 |
| 7613971 |
Semiconductor integrated circuit with delay test circuit, and method for testing semiconductor integrated circuit |
Nov. 3, 2009 |
| 7613968 |
Device and method for JTAG test |
Nov. 3, 2009 |
| 7613966 |
Hyperjtag system including debug probe, on-chip instrumentation, and protocol |
Nov. 3, 2009 |
| 7613965 |
Apparatus and method for high-speed SAS link protocol testing |
Nov. 3, 2009 |
| 7613964 |
Relay device and corresponding method |
Nov. 3, 2009 |
| 7613963 |
Wireless method and apparatus for testing armament circuits |
Nov. 3, 2009 |
| 7612698 |
Test apparatus, manufacturing method, and test method |
Nov. 3, 2009 |
| 7610538 |
Test apparatus and performance board for diagnosis |
Oct. 27, 2009 |
| 7610535 |
Boundary scan connector test method capable of fully utilizing test I/O modules |
Oct. 27, 2009 |
| 7610532 |
Serializer/de-serializer bus controller interface |
Oct. 27, 2009 |
| 7610531 |
Modifying a test pattern to control power supply noise |
Oct. 27, 2009 |
| 7610530 |
Test data generator, test system and method thereof |
Oct. 27, 2009 |
| 7610529 |
Testing mobile wireless devices during device production |
Oct. 27, 2009 |
| 7610528 |
Configuring flash memory |
Oct. 27, 2009 |
| 7610527 |
Test output compaction with improved blocking of unknown values |
Oct. 27, 2009 |
| 7610526 |
On-chip circuitry for bus validation |
Oct. 27, 2009 |
| 7610520 |
Digital data signal testing using arbitrary test signal |
Oct. 27, 2009 |
| 7607057 |
Test wrapper including integrated scan chain for testing embedded hard macro in an integrated circuit chip |
Oct. 20, 2009 |
| 7607056 |
Semiconductor test apparatus for simultaneously testing plurality of semiconductor devices |
Oct. 20, 2009 |
| 7607055 |
Semiconductor memory device and method of testing the same |
Oct. 20, 2009 |
| 7606696 |
Programmable extended compression mask for dynamic trace |
Oct. 20, 2009 |
| 7603603 |
Configurable memory architecture with built-in testing mechanism |
Oct. 13, 2009 |
| 7603598 |
Semiconductor device for testing semiconductor process and method thereof |
Oct. 13, 2009 |
| 7603497 |
Method and apparatus to launch write queue read data in a microprocessor recovery unit |
Oct. 13, 2009 |
| 7602171 |
System for testing memory modules using a rotating-type module mounting portion |
Oct. 13, 2009 |
| 7600167 |
Flip-flop, shift register, and scan test circuit |
Oct. 6, 2009 |
| 7599826 |
System and method for generating various simulation conditions for simulation analysis |
Oct. 6, 2009 |
| 7596731 |
Test time reduction algorithm |
Sep. 29, 2009 |
| 7596730 |
Test method, test system and assist board |
Sep. 29, 2009 |
| 7596729 |
Memory device testing system and method using compressed fail data |
Sep. 29, 2009 |
| 7596173 |
Test apparatus, clock generator and electronic device |
Sep. 29, 2009 |
| 7595467 |
Fault detection system and method for managing the same |
Sep. 29, 2009 |
| 7594150 |
Fault-tolerant architecture of flip-flops for transient pulses and signal delays |
Sep. 22, 2009 |
| 7590911 |
Apparatus and method for testing and debugging an integrated circuit |
Sep. 15, 2009 |
| 7590904 |
Systems and methods for detecting a failure event in a field programmable gate array |
Sep. 15, 2009 |
| 7590903 |
Re-configurable architecture for automated test equipment |
Sep. 15, 2009 |
| 7590902 |
Methods and apparatuses for external delay test of input-output circuits |
Sep. 15, 2009 |
| 7590901 |
Apparatus, system, and method for dynamic recovery and restoration from design defects in an integrated circuit |
Sep. 15, 2009 |
| 7590900 |
Flip flop circuit & same with scan function |
Sep. 15, 2009 |
| 7590891 |
Debugging circuit and a method of controlling the debugging circuit |
Sep. 15, 2009 |
| 7587649 |
Testing of reconfigurable logic and interconnect sources |
Sep. 8, 2009 |
| 7587642 |
System and method for performing concurrent mixed signal testing on a single processor |
Sep. 8, 2009 |
| 7584392 |
Test compaction using linear-matrix driven scan chains |
Sep. 1, 2009 |
| 7584390 |
Method and system for alternating between programs for execution by cells of an integrated circuit |
Sep. 1, 2009 |
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