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Class Information
Number: 713/601
Name: Electrical computers and digital processing systems: support > Clock control of data processing system, component, or data transmission > Inhibiting timing generator or component
Description: Subject matter wherein a clock or interval generator or a component of the system is inhibited or stopped.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7620828 |
Dynamically changing PCI clocks |
Nov. 17, 2009 |
| 7590880 |
Circuitry and method for detecting and protecting against over-clocking attacks |
Sep. 15, 2009 |
| 7581133 |
System and method of providing real time to devices within a server chassis |
Aug. 25, 2009 |
| 7574618 |
Interface circuit |
Aug. 11, 2009 |
| 7568118 |
Deterministic operation of an input/output interface |
Jul. 28, 2009 |
| 7539885 |
Method and apparatus for adaptive CPU power management |
May. 26, 2009 |
| 7519847 |
System and method for information handling system clock source insitu diagnostics |
Apr. 14, 2009 |
| 7519849 |
Technique for providing service processor access to control and status registers of a module |
Apr. 14, 2009 |
| 7509514 |
Method and device for the sampling of digital data in synchronous transmission, with maintenance of binary integrity |
Mar. 24, 2009 |
| 7493508 |
Information processing device, method, and program |
Feb. 17, 2009 |
| 7478255 |
Clock distribution in multi-cell computing systems |
Jan. 13, 2009 |
| 7471333 |
Image sensing device interface unit |
Dec. 30, 2008 |
| 7469357 |
Method and apparatus for dynamic power management in an execution unit using pipeline wave flow control |
Dec. 23, 2008 |
| 7451338 |
Clock domain crossing |
Nov. 11, 2008 |
| 7444529 |
Microcomputer having rewritable nonvolatile memory |
Oct. 28, 2008 |
| 7444533 |
Method and device for the sampling of digital data in synchronous transmission, with maintenance of binary integrity |
Oct. 28, 2008 |
| 7437584 |
Apparatus and method for reducing power consumption in electronic devices |
Oct. 14, 2008 |
| 7421607 |
Method and apparatus for providing symmetrical output data for a double data rate DRAM |
Sep. 2, 2008 |
| 7421606 |
DLL phase detection using advanced phase equalization |
Sep. 2, 2008 |
| 7409568 |
Power supply voltage droop compensated clock modulation for microprocessors |
Aug. 5, 2008 |
| 7403122 |
RFID tag circuits operable at different speeds |
Jul. 22, 2008 |
| 7395449 |
Method and apparatus for limiting processor clock frequency |
Jul. 1, 2008 |
| 7380152 |
Daisy chained multi-device system and operating method |
May. 27, 2008 |
| 7376857 |
Method of timing calibration using slower data rate pattern |
May. 20, 2008 |
| 7376856 |
Circuit arrangement |
May. 20, 2008 |
| 7370191 |
Method and device for playing compressed multimedia files in semi-power on state of a computer |
May. 6, 2008 |
| 7366937 |
Fast synchronization of a number of digital clocks |
Apr. 29, 2008 |
| 7366938 |
Reset in a system-on-chip circuit |
Apr. 29, 2008 |
| 7350096 |
Circuit to reduce power supply fluctuations in high frequency/ high power circuits |
Mar. 25, 2008 |
| 7340631 |
Drift-tolerant sync pulse circuit in a sync pulse generator |
Mar. 4, 2008 |
| 7337347 |
Information processing system and method for timing adjustment |
Feb. 26, 2008 |
| 7334148 |
Optimization of integrated circuit device I/O bus timing |
Feb. 19, 2008 |
| 7334152 |
Clock switching circuit |
Feb. 19, 2008 |
| 7325152 |
Synchronous signal generator |
Jan. 29, 2008 |
| 7321980 |
Software power control of circuit modules in a shared and distributed DMA system |
Jan. 22, 2008 |
| 7302601 |
Device and method for synchronizing an exchange of data with a remote member |
Nov. 27, 2007 |
| 7293190 |
Noisy clock test method and apparatus |
Nov. 6, 2007 |
| 7284139 |
Processor having real-time power conservation |
Oct. 16, 2007 |
| 7278047 |
Providing different clock frequencies for different interfaces of a device |
Oct. 2, 2007 |
| 7275171 |
Method and apparatus for programmable sampling clock edge selection |
Sep. 25, 2007 |
| 7269754 |
Method and apparatus for flexible and programmable clock crossing control with dynamic compensation |
Sep. 11, 2007 |
| 7257727 |
Timer systems and methods |
Aug. 14, 2007 |
| 7254729 |
Processing system and memory module having frequency selective memory |
Aug. 7, 2007 |
| 7243255 |
Design of instantaneously restartable clocks and their use such as in connecting clocked subsystems using clockless sequencing networks |
Jul. 10, 2007 |
| 7237136 |
Method and apparatus for providing symmetrical output data for a double data rate DRAM |
Jun. 26, 2007 |
| 7237216 |
Clock gating approach to accommodate infrequent additional processing latencies |
Jun. 26, 2007 |
| 7231537 |
Fast data access mode in a memory device |
Jun. 12, 2007 |
| 7219251 |
Programmable clock synchronizer |
May. 15, 2007 |
| 7216247 |
Methods and systems to reduce data skew in FIFOs |
May. 8, 2007 |
| 7194650 |
System and method for synchronizing multiple synchronizer controllers |
Mar. 20, 2007 |
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