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Class Information
Number: 713/600
Name: Electrical computers and digital processing systems: support > Clock control of data processing system, component, or data transmission
Description: Subject matter wherein there is a significant temporal, incremental, or sequencing control provided to a digital data processing system, processor, memory or peripheral, or to data transmission between such systems or components.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| RE40990 |
Data transmission across asynchronous time domains using phase-shifted data packet |
Nov. 17, 2009 |
| 7620828 |
Dynamically changing PCI clocks |
Nov. 17, 2009 |
| 7620788 |
Memory device sequencer and method supporting multiple memory device clock speeds |
Nov. 17, 2009 |
| 7619449 |
Method and apparatus for synchronous clock distribution to a plurality of destinations |
Nov. 17, 2009 |
| 7617409 |
System for checking clock-signal correspondence |
Nov. 10, 2009 |
| 7617339 |
Serial interface circuit for data transfer |
Nov. 10, 2009 |
| 7606952 |
Method for operating serial flash memory |
Oct. 20, 2009 |
| 7606942 |
Method for input output expansion in an embedded system utilizing controlled transitions of first and second signals |
Oct. 20, 2009 |
| 7603579 |
Semiconductor chip and semiconductor integrated circuit device for relaying a reference clock from one hard macro to another |
Oct. 13, 2009 |
| 7602744 |
Detection of a simultaneous occurrence of an event at a plurality of devices |
Oct. 13, 2009 |
| 7600144 |
Data transmission error reduction via automatic data sampling timing adjustment |
Oct. 6, 2009 |
| 7599459 |
Receiving apparatus, data transmission system and receiving method |
Oct. 6, 2009 |
| 7596710 |
Synchronization circuit and method with transparent latches |
Sep. 29, 2009 |
| 7596669 |
Apparatus and method for managing memory in a network switch |
Sep. 29, 2009 |
| 7594146 |
Apparatus, method, and program for correcting time of event trace data |
Sep. 22, 2009 |
| 7590882 |
System, method and storage medium for bus calibration in a memory subsystem |
Sep. 15, 2009 |
| 7590881 |
Method and apparatus for controlling an upper layer in a protocol stack to delay timeouts |
Sep. 15, 2009 |
| 7590880 |
Circuitry and method for detecting and protecting against over-clocking attacks |
Sep. 15, 2009 |
| 7590879 |
Clock edge de-skew |
Sep. 15, 2009 |
| 7590026 |
Access to printing material container |
Sep. 15, 2009 |
| 7587622 |
Power management of components having clock processing circuits |
Sep. 8, 2009 |
| 7581133 |
System and method of providing real time to devices within a server chassis |
Aug. 25, 2009 |
| 7581132 |
System and method for configuring a microcontroller clock system |
Aug. 25, 2009 |
| 7581131 |
Method and system for balancing clock trees in a multi-voltage synchronous digital environment |
Aug. 25, 2009 |
| 7577863 |
Addressing type frequency counter circuit |
Aug. 18, 2009 |
| 7577861 |
Duty cycle rejecting serializing multiplexer for output data drivers |
Aug. 18, 2009 |
| 7577226 |
Clock recovery circuitry |
Aug. 18, 2009 |
| 7574618 |
Interface circuit |
Aug. 11, 2009 |
| 7574274 |
Method and system for synchronizing audio processing modules |
Aug. 11, 2009 |
| 7573932 |
Spread spectrum clock generator |
Aug. 11, 2009 |
| 7571342 |
Processor system, instruction sequence optimization device, and instruction sequence optimization program |
Aug. 4, 2009 |
| 7571341 |
Method and system for fast frequency switch for a power throttle in an integrated device |
Aug. 4, 2009 |
| 7568118 |
Deterministic operation of an input/output interface |
Jul. 28, 2009 |
| 7565564 |
Switching circuit and method thereof for dynamically switching host clock signals |
Jul. 21, 2009 |
| 7561582 |
Data reception device |
Jul. 14, 2009 |
| 7558980 |
Systems and methods for the distribution of differential clock signals to a plurality of low impedance receivers |
Jul. 7, 2009 |
| 7558530 |
Device for generating a clock signal |
Jul. 7, 2009 |
| 7555670 |
Clocking architecture using a bidirectional clock port |
Jun. 30, 2009 |
| 7555669 |
Timing vector program mechanism |
Jun. 30, 2009 |
| 7555585 |
Optimized performance and power access to a shared resource in a multiclock frequency system on a chip application |
Jun. 30, 2009 |
| 7552353 |
Controlling circuit for automatically adjusting clock frequency of a central processing unit |
Jun. 23, 2009 |
| 7552252 |
Memory interface circuit and method |
Jun. 23, 2009 |
| 7549075 |
System and method for adjusting execution frequency of a central processing unit |
Jun. 16, 2009 |
| 7546480 |
High speed bus with alignment, re-timing and buffer underflow/overflow detection enhancements |
Jun. 9, 2009 |
| 7545896 |
Asynchronous multi-clock system |
Jun. 9, 2009 |
| 7543172 |
Strobe masking in a signaling system having multiple clock domains |
Jun. 2, 2009 |
| 7543094 |
Target readiness protocol for contiguous write |
Jun. 2, 2009 |
| 7539889 |
Media data synchronization in a wireless network |
May. 26, 2009 |
| 7539793 |
Synchronized multichannel universal serial bus |
May. 26, 2009 |
| 7536580 |
System and method for generating timer output corresponding to timer request from plurality of processes |
May. 19, 2009 |
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