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Class Information
Number: 713/401
Name: Electrical computers and digital processing systems: support > Synchronization of clock or timing signals, data, or pulses > Using delay
Description: Subject matter wherein the clock or timing signals, timing pulses, or data are delayed to provide synchronization.










Patents under this class:
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Patent Number Title Of Patent Date Issued
8707078 Methods and apparatus for trimming of CDR clock buffer using histogram of clock-like data pattern Apr. 22, 2014
8707001 Method and system for measuring memory access time using phase detector Apr. 22, 2014
8707080 Simple circular asynchronous clock domain crossing technique for digital data Apr. 22, 2014
8687436 Increasing efficiency of memory accesses by selectively introducing a relative delay between the time that write addresses are provided to the memory and the time that write data is provided t Apr. 1, 2014
8687799 Data processing circuit and control method therefor Apr. 1, 2014
8683252 Method for ensuring synchronous presentation of additional data with audio data Mar. 25, 2014
8683253 Optimized synchronous strobe transmission mechanism Mar. 25, 2014
8677170 Method for generating a clock signal Mar. 18, 2014
8677173 Method and circuit for trimming an internal oscillator of a USB device Mar. 18, 2014
8671302 Method and apparatus for wireless clock regeneration Mar. 11, 2014
8671303 Write-leveling implementation in programmable logic devices Mar. 11, 2014
8671301 Method for ensuring synchronous presentation of additional data with audio data Mar. 11, 2014
8665913 Communication device to obtain time information Mar. 4, 2014
8661274 Temperature compensating adaptive voltage scalers (AVSs), systems, and methods Feb. 25, 2014
8661285 Dynamically calibrated DDR memory controller Feb. 25, 2014
8643416 Semiconductor device including a delay locked loop circuit Feb. 4, 2014
8638137 Delay locked loop Jan. 28, 2014
8631266 Semiconductor memory device and method of controlling the same Jan. 14, 2014
8631267 Adjustable byte lane offset for memory module to reduce skew Jan. 14, 2014
8627134 Semiconductor apparatus and local skew detecting circuit therefor Jan. 7, 2014
8601231 Semiconductor memory asynchronous pipeline Dec. 3, 2013
8595537 DLL phase detection using advanced phase equalization Nov. 26, 2013
8588355 Timing recovery controller and operation method thereof Nov. 19, 2013
8589720 Synchronizing timing mismatch by data insertion Nov. 19, 2013
8583957 Clock distribution in a distributed system with multiple clock domains over a switched fabric Nov. 12, 2013
8572425 Data processing device and mobile device Oct. 29, 2013
8560875 Apparatus for clock calibrating a less precise second clock signal with a more precise first clock signal wherein the first clock signal is inactive during a sniff mode and the second clock si Oct. 15, 2013
8549535 Distributed taskflow architecture Oct. 1, 2013
8543746 Self-synchronizing data streaming between address-based producer and consumer circuits Sep. 24, 2013
8543750 Method for sharing a resource and circuit making use of same Sep. 24, 2013
8527803 System and method for multiple backplane time synchronization Sep. 3, 2013
8527804 Architecture and method for eliminating store buffers in a DSP/processor with multiple memory accesses Sep. 3, 2013
8516292 Method and apparatus for providing symmetrical output data for a double data rate DRAM Aug. 20, 2013
8516291 Information processing apparatus, data reception device and method of controlling the information processing apparatus Aug. 20, 2013
8504788 Memory controller, system and method for read signal timing calibration Aug. 6, 2013
8504863 Drift tracking feedback for communication channels Aug. 6, 2013
8504864 Data sensor coordination using time synchronization in a multi-bus controller area network system Aug. 6, 2013
8504865 Dynamic phase alignment Aug. 6, 2013
8504868 Computer system with synchronization/desynchronization controller Aug. 6, 2013
8495409 Host controller, semiconductor device and method for setting sampling phase Jul. 23, 2013
8495410 Sampling phase correcting host controller, semiconductor device and method Jul. 23, 2013
RE44383 Method of self-synchronization of configurable elements of a programmable module Jul. 16, 2013
8484501 System for delay locked loop control that provides delay interval stabilization Jul. 9, 2013
8484389 AV renderer peripheral with dual inerrupt lines for staggered interrupts Jul. 9, 2013
RE44365 Method of self-synchronization of configurable elements of a programmable module Jul. 9, 2013
8429438 Method and apparatus for transferring data between asynchronous clock domains Apr. 23, 2013
8429439 Inter-pair skew adjustment Apr. 23, 2013
8423813 Memory controller and device with data strobe calibration Apr. 16, 2013
8407509 Method for compensating for variations in data timing Mar. 26, 2013
8407508 Serial bus clock frequency calibration system and method thereof Mar. 26, 2013

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