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Class Information
Number: 712/31
Name: Electrical computers and digital processing systems: processing architectures and instruction processing (e.g., processors) > Processing architecture > Distributed processing system > Operation > Master/slave
Description: Subject matter wherein the physically separate processors include a primary processor (master) controlling the operation of a secondary processor (slave).
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7620780 |
Multiprocessor system with cache controlled scatter-gather operations |
Nov. 17, 2009 |
| 7606867 |
Ordered application message delivery using multiple processors in a network element |
Oct. 20, 2009 |
| 7587717 |
Dynamic master/slave configuration for multiple expansion modules |
Sep. 8, 2009 |
| 7574582 |
Processor array including delay elements associated with primary bus nodes |
Aug. 11, 2009 |
| 7525548 |
Video processing with multiple graphical processing units |
Apr. 28, 2009 |
| 7502958 |
System and method for providing firmware recoverable lockstep protection |
Mar. 10, 2009 |
| 7487221 |
Network system, distributed processing method and information processing apparatus |
Feb. 3, 2009 |
| 7457939 |
Processing system with dedicated local memories and busy identification |
Nov. 25, 2008 |
| 7454547 |
Data exchange between a runtime environment and a computer firmware in a multi-processor computing system |
Nov. 18, 2008 |
| 7424595 |
System for managing circuitry of variable function information processing circuit and method for managing circuitry of variable function information processing circuit |
Sep. 9, 2008 |
| 7395410 |
Processor system with an improved instruction decode control unit that controls data transfer between processor and coprocessor |
Jul. 1, 2008 |
| 7380037 |
Data transmitter between external device and working memory |
May. 27, 2008 |
| 7356733 |
System and method for system firmware causing an operating system to idle a processor |
Apr. 8, 2008 |
| 7346051 |
Slave device, master device and stacked device |
Mar. 18, 2008 |
| 7237041 |
Systems and methods for automatic assignment of identification codes to devices |
Jun. 26, 2007 |
| 7234011 |
Advanced microcontroller bus architecture (AMBA) system with reduced power consumption and method of driving AMBA system |
Jun. 19, 2007 |
| 7159211 |
Method for executing a sequential program in parallel with automatic fault tolerance |
Jan. 2, 2007 |
| 7152125 |
Dynamic master/slave configuration for multiple expansion modules |
Dec. 19, 2006 |
| 7137121 |
Data-processing circuit and method for switching between application programs without an operating system |
Nov. 14, 2006 |
| 7127594 |
Multiprocessor system and program optimizing method |
Oct. 24, 2006 |
| 7076676 |
Sequence alignment logic for generating output representing the slowest from group write slaves response inputs |
Jul. 11, 2006 |
| 7072803 |
Device and process for acquisition of measurements using a digital communication bus, particularly used during aircraft tests |
Jul. 4, 2006 |
| 7035906 |
Global network computers |
Apr. 25, 2006 |
| 6952713 |
Information processing device |
Oct. 4, 2005 |
| 6952618 |
Input/output control systems and methods having a plurality of master and slave controllers |
Oct. 4, 2005 |
| 6922736 |
Computer system and data processing method |
Jul. 26, 2005 |
| 6907454 |
Data processing system with master and slave processors |
Jun. 14, 2005 |
| 6839866 |
System and method for the use of reset logic in high availability systems |
Jan. 4, 2005 |
| 6836840 |
Slaves with identification and selection stages for group write |
Dec. 28, 2004 |
| 6831648 |
Synchronized image display and buffer swapping in a multiple display environment |
Dec. 14, 2004 |
| 6826673 |
Communications protocol processing by real time processor off-loading operations to queue for processing by non-real time processor |
Nov. 30, 2004 |
| 6809733 |
Swap buffer synchronization in a distributed rendering system |
Oct. 26, 2004 |
| 6789182 |
System and method for logging computer event data and physical components of a complex distributed system |
Sep. 7, 2004 |
| 6782468 |
Shared memory type vector processing system, including a bus for transferring a vector processing instruction, and control method thereof |
Aug. 24, 2004 |
| 6754811 |
Operating system device centric agent |
Jun. 22, 2004 |
| 6735683 |
Single-chip microcomputer with hierarchical internal bus structure having data and address signal lines coupling CPU with other processing elements |
May. 11, 2004 |
| 6668288 |
Telecommunications data conferencing platform having secure firewall wherein access is restricted to messages originating from server but conference data pass freely |
Dec. 23, 2003 |
| 6604189 |
Master/slave processor memory inter accessability in an integrated embedded system |
Aug. 5, 2003 |
| 6597956 |
Method and apparatus for controlling an extensible computing system |
Jul. 22, 2003 |
| 6591294 |
Processing system with microcomputers each operable in master and slave modes using configurable bus access control terminals and bus use priority signals |
Jul. 8, 2003 |
| 6574725 |
Method and mechanism for speculatively executing threads of instructions |
Jun. 3, 2003 |
| 6564179 |
DSP emulating a microcontroller |
May. 13, 2003 |
| 6560750 |
Method for providing master-slave heat-swapping apparatus and mechanism on a mono-ATA bus |
May. 6, 2003 |
| 6553465 |
Multiprocessor system with distributed shared memory having hot plug function for main memories |
Apr. 22, 2003 |
| 6526583 |
Interactive set-top box having a unified memory architecture |
Feb. 25, 2003 |
| 6496517 |
Direct attach of interrupt controller to processor module |
Dec. 17, 2002 |
| 6487617 |
Source-destination re-timed cooperative communication bus |
Nov. 26, 2002 |
| 6467009 |
Configurable processor system unit |
Oct. 15, 2002 |
| 6460129 |
Pipeline operation method and pipeline operation device to interlock the translation of instructions based on the operation of a non-pipeline operation unit |
Oct. 1, 2002 |
| 6446192 |
Remote monitoring and control of equipment over computer networks using a single web interfacing chip |
Sep. 3, 2002 |
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