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Class Information
Number: 712/30
Name: Electrical computers and digital processing systems: processing architectures and instruction processing (e.g., processors) > Processing architecture > Distributed processing system > Operation
Description: Subject matter wherein functioning of the processors is specified.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7600095 |
Executing scatter operation to parallel computer nodes by repeatedly broadcasting content of send buffer partition corresponding to each node upon bitwise OR operation |
Oct. 6, 2009 |
| 7594250 |
Method and system of program transmission optimization using a redundant transmission sequence |
Sep. 22, 2009 |
| 7523293 |
Spawn-join instruction set architecture for providing explicit multithreading |
Apr. 21, 2009 |
| 7506138 |
Launching applications on compute and service processors running under different operating systems in scalable network of processor boards with routers |
Mar. 17, 2009 |
| 7454595 |
Distributed processor allocation for launching applications in a massively connected processors complex |
Nov. 18, 2008 |
| 7447676 |
Method and system of collecting execution statistics of query statements |
Nov. 4, 2008 |
| 7437534 |
Local and global register partitioning technique |
Oct. 14, 2008 |
| 7401333 |
Array of parallel programmable processing engines and deterministic method of operating the same |
Jul. 15, 2008 |
| 7362762 |
Distributed packet processing with ordered locks to maintain requisite packet orderings |
Apr. 22, 2008 |
| 7356819 |
Task distribution |
Apr. 8, 2008 |
| 7281118 |
Sending thread message generated using DCR command pointed message control block storing message and response memory address in multiprocessor |
Oct. 9, 2007 |
| 7162615 |
Data transfer bus communication using single request to perform command and return data to destination indicated in context to allow thread context switch |
Jan. 9, 2007 |
| 7103752 |
Method and apparatus for broadcasting messages with set priority to guarantee knowledge of a state within a data processing system |
Sep. 5, 2006 |
| 7093104 |
Processing modules for computer architecture for broadband networks |
Aug. 15, 2006 |
| 7000098 |
Passing a received packet for modifying pipelining processing engines' routine instructions |
Feb. 14, 2006 |
| 6981074 |
Descriptor-based load balancing |
Dec. 27, 2005 |
| 6952713 |
Information processing device |
Oct. 4, 2005 |
| 6922736 |
Computer system and data processing method |
Jul. 26, 2005 |
| 6892286 |
Shared memory multiprocessor memory model verification system and method |
May. 10, 2005 |
| 6789182 |
System and method for logging computer event data and physical components of a complex distributed system |
Sep. 7, 2004 |
| 6754892 |
Instruction packing for an advanced microprocessor |
Jun. 22, 2004 |
| 6721813 |
Computer system implementing a system and method for tracking the progress of posted write transactions |
Apr. 13, 2004 |
| 6691220 |
Multiprocessor speculation mechanism via a barrier speculation flag |
Feb. 10, 2004 |
| 6675376 |
System and method for fusing instructions |
Jan. 6, 2004 |
| 6671565 |
Electronic control apparatus having mode check function |
Dec. 30, 2003 |
| 6651157 |
Multi-processor system and method of accessing data therein |
Nov. 18, 2003 |
| 6609192 |
System and method for asynchronously overlapping storage barrier operations with old and new storage operations |
Aug. 19, 2003 |
| 6606702 |
Multiprocessor speculation mechanism with imprecise recycling of storage operations |
Aug. 12, 2003 |
| 6557048 |
Computer system implementing a system and method for ordering input/output (IO) memory operations within a coherent portion thereof |
Apr. 29, 2003 |
| 6553442 |
Bus master for SMP execution of global operations utilizing a single token with implied release |
Apr. 22, 2003 |
| 6487455 |
Distributed real time operating system |
Nov. 26, 2002 |
| 6473849 |
Implementing locks in a distributed processing system |
Oct. 29, 2002 |
| 6425094 |
Diagnostic cage for testing redundant system controllers |
Jul. 23, 2002 |
| 6389526 |
Circuit and method for selectively stalling interrupt requests initiated by devices coupled to a multiprocessor system |
May. 14, 2002 |
| 6389513 |
Disk block cache management for a distributed shared memory computer system |
May. 14, 2002 |
| 6351798 |
Address resolution unit and address resolution method for a multiprocessor system |
Feb. 26, 2002 |
| 6330583 |
Computer network of interactive multitasking computers for parallel processing of network subtasks concurrently with local tasks |
Dec. 11, 2001 |
| 6311263 |
Data processing circuits and interfaces |
Oct. 30, 2001 |
| 6304901 |
Multiple VLAN architecture system |
Oct. 16, 2001 |
| 6275890 |
Low latency data path in a cross-bar switch providing dynamically prioritized bus arbitration |
Aug. 14, 2001 |
| 6272618 |
System and method for handling interrupts in a multi-processor computer |
Aug. 7, 2001 |
| 6253304 |
Collation of interrupt control devices |
Jun. 26, 2001 |
| 6161170 |
Multiple processor, distributed memory computer with out-of-order processing |
Dec. 12, 2000 |
| 6119143 |
Computer system and method for load balancing with selective control |
Sep. 12, 2000 |
| 6117180 |
Hardware-software co-synthesis of heterogeneous distributed embedded systems for low overhead fault tolerance |
Sep. 12, 2000 |
| 6112283 |
Out-of-order snooping for multiprocessor computer systems |
Aug. 29, 2000 |
| 6085307 |
Multiple native instruction set master/slave processor arrangement and method thereof |
Jul. 4, 2000 |
| 6032245 |
Method and system for interrupt handling in a multi-processor computer system executing speculative instruction threads |
Feb. 29, 2000 |
| 6014705 |
Modular portable data processing terminal having a higher layer and lower layer partitioned communication protocol stack for use in a radio frequency communications network |
Jan. 11, 2000 |
| 5978831 |
Synchronous multiprocessor using tasks directly proportional in size to the individual processors rates |
Nov. 2, 1999 |
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