| Patent Number |
Title Of Patent |
Date Issued |
| 7350057 |
Scalar result producing method in vector/scalar system by vector unit from vector results according to modifier in vector instruction |
Mar. 25, 2008 |
| 7334110 |
Decoupled scalar/vector computer architecture system and method |
Feb. 19, 2008 |
| 7305540 |
Method and apparatus for data processing |
Dec. 4, 2007 |
| 7254696 |
Functional-level instruction-set computer architecture for processing application-layer content-service requests such as file-access requests |
Aug. 7, 2007 |
| 7032101 |
Method and apparatus for prioritized instruction issue queue in a processor |
Apr. 18, 2006 |
| 7028145 |
Protocol processor intended for the execution of a collection of instructions in a reduced number of operations |
Apr. 11, 2006 |
| 6963341 |
Fast and flexible scan conversion and matrix transpose in a SIMD processor |
Nov. 8, 2005 |
| 6857061 |
Method and apparatus for obtaining a scalar value directly from a vector register |
Feb. 15, 2005 |
| 6839889 |
Mixed hardware/software architecture and method for processing xDSL communications |
Jan. 4, 2005 |
| 6839828 |
SIMD datapath coupled to scalar/vector/address/conditional data register file with selective subpath scalar processing mode |
Jan. 4, 2005 |
| 6734874 |
Graphics processing unit with transform module capable of handling scalars and vectors |
May. 11, 2004 |
| 6665774 |
Vector and scalar data cache for a vector multiprocessor |
Dec. 16, 2003 |
| 6609189 |
Cycle segmented prefix circuits |
Aug. 19, 2003 |
| 6530011 |
Method and apparatus for vector register with scalar values |
Mar. 4, 2003 |
| 6496902 |
Vector and scalar data cache for a vector multiprocessor |
Dec. 17, 2002 |
| 6266686 |
Emptying packed data state during execution of packed data instructions |
Jul. 24, 2001 |
| 6219775 |
Massively parallel computer including auxiliary vector processor |
Apr. 17, 2001 |
| 6212617 |
Parallel processing method and system using a lazy parallel data type to reduce inter-processor communication |
Apr. 3, 2001 |
| 6141673 |
Microprocessor modified to perform inverse discrete cosine transform operations on a one-dimensional matrix of numbers within a minimal number of instructions |
Oct. 31, 2000 |
| 6106573 |
Apparatus and method for tracing microprocessor instructions |
Aug. 22, 2000 |
| 6073158 |
System and method for processing multiple received signal sources |
Jun. 6, 2000 |
| 6061776 |
Multiple processor, distributed memory computer with out-of-order processing |
May. 9, 2000 |
| 6055620 |
Apparatus and method for system control using a self-timed asynchronous control structure |
Apr. 25, 2000 |
| 6052769 |
Method and apparatus for moving select non-contiguous bytes of packed data in a single instruction |
Apr. 18, 2000 |
| 6044453 |
User programmable circuit and method for data processing apparatus using a self-timed asynchronous control structure |
Mar. 28, 2000 |
| 6038654 |
High performance, superscalar-based computer system with out-of-order instruction execution |
Mar. 14, 2000 |
| 5991865 |
MPEG motion compensation using operand routing and performing add and divide in a single instruction |
Nov. 23, 1999 |
| 5935230 |
Multiprocessor arrangement including bus arbitration scheme involving plural CPU clusters that address each other as "phantom" CPUs |
Aug. 10, 1999 |
| 5872987 |
Massively parallel computer including auxiliary vector processor |
Feb. 16, 1999 |
| 5819054 |
Storage system realizing scalability and fault tolerance |
Oct. 6, 1998 |
| 5742842 |
Data processing apparatus for executing a vector operation under control of a master processor |
Apr. 21, 1998 |
| 5737586 |
Data processing system and method thereof |
Apr. 7, 1998 |
| 5717947 |
Data processing system and method thereof |
Feb. 10, 1998 |
| 5600846 |
Data processing system and method thereof |
Feb. 4, 1997 |
| 5598571 |
Data processor for conditionally modifying extension bits in response to data processing instruction execution |
Jan. 28, 1997 |
| 5561808 |
Asymmetric vector multiprocessor composed of a vector unit and a plurality of scalar units each having a different architecture |
Oct. 1, 1996 |
| 5517666 |
Program controlled processor wherein vector distributor and vector coupler operate independently of sequencer |
May. 14, 1996 |
| 5475849 |
Memory control device with vector processors and a scalar processor |
Dec. 12, 1995 |
| 5430884 |
Scalar/vector processor |
Jul. 4, 1995 |
| 5418973 |
Digital computer system with cache controller coordinating both vector and scalar operations |
May. 23, 1995 |
| 5319791 |
System for predicting memory fault in vector processor by sensing indication signal to scalar processor to continue a next vector instruction issuance |
Jun. 7, 1994 |
| 5261113 |
Apparatus and method for single operand register array for vector and scalar data processing operations |
Nov. 9, 1993 |
| 5247691 |
System for releasing suspended execution of scalar instructions following a wait instruction immediately upon change of vector post pending signal |
Sep. 21, 1993 |
| 5226171 |
Parallel vector processing system for individual and broadcast distribution of operands and control information |
Jul. 6, 1993 |
| 5197130 |
Cluster architecture for a highly parallel scalar/vector multiprocessor system |
Mar. 23, 1993 |
| 5073970 |
Vector processing apparatus allowing succeeding vector instruction chain processing upon completion of decoding of a preceding vector instruction chain |
Dec. 17, 1991 |
| 5021991 |
Coprocessor instruction format |
Jun. 4, 1991 |
| 4991083 |
Method and system for extending address space for vector processing |
Feb. 5, 1991 |
| 4987534 |
Processor having synchronized operation between a CPU and a vector processor |
Jan. 22, 1991 |
| 4964035 |
Vector processor capable of high-speed access to processing results from scalar processor |
Oct. 16, 1990 |
