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Class Information
Number: 712/234
Name: Electrical computers and digital processing systems: processing architectures and instruction processing (e.g., processors) > Processing control > Branching (e.g., delayed branch, loop control, branch predict, interrupt) > Conditional branching
Description: Subject matter including means or steps for supporting changes in program execution flow based upon some condition within the processor (e.g., branch if equal, branch if zero, etc.).
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7434036 |
System and method for executing software program instructions using a condition specified within a conditional execution instruction |
Oct. 7, 2008 |
| 7428632 |
Branch prediction mechanism using a branch cache memory and an extended pattern cache |
Sep. 23, 2008 |
| 7421572 |
Branch instruction for processor with branching dependent on a specified bit in a register |
Sep. 2, 2008 |
| 7418578 |
Simultaneously assigning corresponding entry in multiple queues of multi-stage entries for storing condition attributes for validating simultaneously executed conditional execution instruction |
Aug. 26, 2008 |
| 7415602 |
Apparatus and method for processing a sequence of jump instructions |
Aug. 19, 2008 |
| 7406613 |
Translation lookaside buffer (TLB) suppression for intra-page program counter relative or absolute address branch instructions |
Jul. 29, 2008 |
| 7398373 |
System and method for processing complex computer instructions |
Jul. 8, 2008 |
| 7389405 |
Digital signal processor architecture with optimized memory access for code discontinuity |
Jun. 17, 2008 |
| 7370182 |
Method of handling branching instructions within a processor, in particular a processor for digital signal processing, and corresponding processor |
May. 6, 2008 |
| 7353369 |
System and method for managing divergent threads in a SIMD architecture |
Apr. 1, 2008 |
| 7350061 |
Assigning free register to unmaterialized predicate in inverse predicate expression obtained for branch reversal in predicated execution system |
Mar. 25, 2008 |
| 7340592 |
Executing a translated block of instructions and branching to correction code when expected top of stack does not match actual top of stack to adjust stack at execution time to continue execut |
Mar. 4, 2008 |
| 7337306 |
Executing conditional branch instructions in a data processor having a clustered architecture |
Feb. 26, 2008 |
| 7322027 |
Detecting termination and providing information related to termination of a computer system process |
Jan. 22, 2008 |
| 7318228 |
System and method for task arbitration in multi-threaded simulations |
Jan. 8, 2008 |
| 7302555 |
Zero overhead branching and looping in time stationary processors |
Nov. 27, 2007 |
| 7302556 |
Method, apparatus and computer program product for implementing level bias function for branch prediction control for generating test simulation vectors |
Nov. 27, 2007 |
| 7296141 |
Method for cancelling speculative conditional delay slot instructions |
Nov. 13, 2007 |
| 7281122 |
Method and apparatus for nested control flow of instructions using context information and instructions having extra bits |
Oct. 9, 2007 |
| 7278014 |
System and method for simulating hardware interrupts |
Oct. 2, 2007 |
| 7272704 |
Hardware looping mechanism and method for efficient execution of discontinuity instructions |
Sep. 18, 2007 |
| 7260704 |
Method and apparatus for reinforcing a prefetch chain |
Aug. 21, 2007 |
| 7257665 |
Branch-aware FIFO for interprocessor data sharing |
Aug. 14, 2007 |
| 7251808 |
Graphical debugger with loadmap display manager and custom record display manager displaying user selected customized records from bound program objects |
Jul. 31, 2007 |
| 7251721 |
Conditional link pointer register sets marking the beginning and end of a conditional instruction block where each set corresponds to a single stage of a pipeline that moves link pointers thro |
Jul. 31, 2007 |
| 7243350 |
Speculative execution for java hardware accelerator |
Jul. 10, 2007 |
| 7237098 |
Apparatus and method for selectively overriding return stack prediction in response to detection of non-standard return sequence |
Jun. 26, 2007 |
| 7219279 |
Software testing |
May. 15, 2007 |
| 7210024 |
Conditional instruction execution via emissary instruction for condition evaluation |
Apr. 24, 2007 |
| 7203827 |
Link and fall-through address formation using a program counter portion selected by a specific branch address bit |
Apr. 10, 2007 |
| 7203936 |
Determining guarding predicate from partition graph based deduction to generate inverse predicate expression for branch reversal |
Apr. 10, 2007 |
| 7200717 |
Processor, data processing system and method for synchronizing access to data in shared memory |
Apr. 3, 2007 |
| 7197604 |
Processor, data processing system and method for synchronzing access to data in shared memory |
Mar. 27, 2007 |
| 7194599 |
Configurable co-processor interface |
Mar. 20, 2007 |
| 7178012 |
Semiconductor device |
Feb. 13, 2007 |
| 7167973 |
Method and system for performing multi-tests in processors using results to set a register and indexing based on the register |
Jan. 23, 2007 |
| 7139902 |
Implementation of an efficient instruction fetch pipeline utilizing a trace cache |
Nov. 21, 2006 |
| 7103882 |
Optimization apparatus, complier program, optimization method and recording medium |
Sep. 5, 2006 |
| 7100023 |
System and method for processing complex computer instructions |
Aug. 29, 2006 |
| 7080238 |
Non-blocking, multi-context pipelined processor |
Jul. 18, 2006 |
| 7062639 |
Method and apparatus for performing predicate prediction |
Jun. 13, 2006 |
| 7039776 |
Patch memory system for a ROM-based processor |
May. 2, 2006 |
| 7036003 |
Instruction processing device and method for controlling branch instruction accompanied by mode change |
Apr. 25, 2006 |
| 7020765 |
Marking queue for simultaneous execution of instructions in code block specified by conditional execution instruction |
Mar. 28, 2006 |
| 7017031 |
Method, apparatus and system for managing released promotion bits |
Mar. 21, 2006 |
| 7017033 |
Arithmetic apparatus and arithmetic method |
Mar. 21, 2006 |
| 7010670 |
Data processing device that controls an overriding of a subsequent instruction in accordance with a conditional execution status updated by a sequencer |
Mar. 7, 2006 |
| 7003762 |
Computer-implemented exception handling system and method |
Feb. 21, 2006 |
| 7000091 |
System and method for independent branching in systems with plural processing elements |
Feb. 14, 2006 |
| 6996700 |
Microcomputer and dividing circuit |
Feb. 7, 2006 |
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