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Class Information
Number: 712/233
Name: Electrical computers and digital processing systems: processing architectures and instruction processing (e.g., processors) > Processing control > Branching (e.g., delayed branch, loop control, branch predict, interrupt)
Description: Subject matter including means or steps for performing a change in instruction data flow brought about by instruction data execution or external stimuli.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7620803 |
Data processing device and electronic equipment using pipeline control |
Nov. 17, 2009 |
| 7613907 |
Embedded software camouflage against code reverse engineering |
Nov. 3, 2009 |
| 7607133 |
Interrupt processing control |
Oct. 20, 2009 |
| 7603544 |
Dynamic allocation of a buffer across multiple clients in multi-threaded processor without performing a complete flush of data associated with allocation |
Oct. 13, 2009 |
| 7590832 |
Information processing device, compressed program producing method, and information processing system |
Sep. 15, 2009 |
| 7587532 |
Full/selector output from one of plural flag generation count outputs |
Sep. 8, 2009 |
| 7574586 |
Efficient transfer of branch information |
Aug. 11, 2009 |
| 7539853 |
Handling interrupts in data processing of data in which only a portion of a function has been processed |
May. 26, 2009 |
| 7529914 |
Method and apparatus for speculative execution of uncontended lock instructions |
May. 5, 2009 |
| 7519777 |
Methods, systems and computer program products for concomitant pair prefetching |
Apr. 14, 2009 |
| 7503049 |
Information processing apparatus operable to switch operating systems |
Mar. 10, 2009 |
| 7493479 |
Method and apparatus for event detection for multiple instruction-set processor |
Feb. 17, 2009 |
| 7487334 |
Branch encoding before instruction cache write |
Feb. 3, 2009 |
| 7477255 |
System and method for synchronizing divergent samples in a programmable graphics processing unit |
Jan. 13, 2009 |
| 7472384 |
System, method and computer program product for on-the-fly patching of executable code |
Dec. 30, 2008 |
| 7472261 |
Method for performing externally assisted calls in a heterogeneous processing complex |
Dec. 30, 2008 |
| 7434035 |
Method and system for processing instructions in grouped and non-grouped modes |
Oct. 7, 2008 |
| 7428632 |
Branch prediction mechanism using a branch cache memory and an extended pattern cache |
Sep. 23, 2008 |
| 7415601 |
Method and apparatus for elimination of prolog and epilog instructions in a vector processor using data validity tags and sink counters |
Aug. 19, 2008 |
| 7412592 |
Branch instruction control apparatus and control method |
Aug. 12, 2008 |
| 7386647 |
System and method for processing an interrupt in a processor supporting multithread execution |
Jun. 10, 2008 |
| 7370182 |
Method of handling branching instructions within a processor, in particular a processor for digital signal processing, and corresponding processor |
May. 6, 2008 |
| 7363477 |
Method and apparatus to reduce misprediction penalty by exploiting exact convergence |
Apr. 22, 2008 |
| 7350061 |
Assigning free register to unmaterialized predicate in inverse predicate expression obtained for branch reversal in predicated execution system |
Mar. 25, 2008 |
| 7340588 |
Extending the number of instruction bits in processors with fixed length instructions, in a manner compatible with existing code |
Mar. 4, 2008 |
| 7340628 |
Branch based activity monitoring |
Mar. 4, 2008 |
| 7318145 |
Random slip generator |
Jan. 8, 2008 |
| 7308562 |
System and method for improved branch performance in pipelined computer architectures |
Dec. 11, 2007 |
| 7302556 |
Method, apparatus and computer program product for implementing level bias function for branch prediction control for generating test simulation vectors |
Nov. 27, 2007 |
| 7299369 |
Power reduction in microprocessor systems |
Nov. 20, 2007 |
| 7296141 |
Method for cancelling speculative conditional delay slot instructions |
Nov. 13, 2007 |
| 7284116 |
Method and system for safe data dependency collapsing based on control-flow speculation |
Oct. 16, 2007 |
| 7281122 |
Method and apparatus for nested control flow of instructions using context information and instructions having extra bits |
Oct. 9, 2007 |
| 7278011 |
Completion table configured to track a larger number of outstanding instructions without increasing the size of the completion table |
Oct. 2, 2007 |
| 7278062 |
Method and apparatus for responding to access errors in a data processing system |
Oct. 2, 2007 |
| 7272704 |
Hardware looping mechanism and method for efficient execution of discontinuity instructions |
Sep. 18, 2007 |
| 7272748 |
Method and apparatus to detect and recover from a stack frame corruption |
Sep. 18, 2007 |
| 7266676 |
Method and apparatus for branch prediction based on branch targets utilizing tag and data arrays |
Sep. 4, 2007 |
| 7260704 |
Method and apparatus for reinforcing a prefetch chain |
Aug. 21, 2007 |
| 7260705 |
Apparatus to implement mesocode |
Aug. 21, 2007 |
| 7257665 |
Branch-aware FIFO for interprocessor data sharing |
Aug. 14, 2007 |
| 7254689 |
Decompression of block-sorted data |
Aug. 7, 2007 |
| 7243350 |
Speculative execution for java hardware accelerator |
Jul. 10, 2007 |
| 7237098 |
Apparatus and method for selectively overriding return stack prediction in response to detection of non-standard return sequence |
Jun. 26, 2007 |
| 7228528 |
Building inter-block streams from a dynamic execution trace for a program |
Jun. 5, 2007 |
| 7222064 |
Instruction processor emulation having inter-processor messaging accounting |
May. 22, 2007 |
| 7219216 |
Method for identifying basic blocks with conditional delay slot instructions |
May. 15, 2007 |
| 7197630 |
Method and system for changing the executable status of an operation following a branch misprediction without refetching the operation |
Mar. 27, 2007 |
| 7194609 |
Branch reconfigurable systems and methods |
Mar. 20, 2007 |
| 7188337 |
Interrupt program module |
Mar. 6, 2007 |
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