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Class Information
Number: 712/228
Name: Electrical computers and digital processing systems: processing architectures and instruction processing (e.g., processors) > Processing control > Context preserving (e.g., context swapping, checkpointing, register windowing
Description: Subject matter including means for storing volatile data contained in processor registers such that the volatile data can be restored at some point later in time.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7624257 |
Digital data processing apparatus having hardware multithreading support including a register set reserved for special class threads |
Nov. 24, 2009 |
| 7620798 |
Latency tolerant pipeline synchronization |
Nov. 17, 2009 |
| 7610451 |
Data transfer mechanism using unidirectional pull bus and push bus |
Oct. 27, 2009 |
| 7607042 |
Adjusting a processor operating parameter based on a performance criterion |
Oct. 20, 2009 |
| 7603673 |
Method and system for reducing context switch times |
Oct. 13, 2009 |
| 7603566 |
Authenticated process switching on a microprocessor |
Oct. 13, 2009 |
| 7600101 |
Multithreaded hardware systems and methods |
Oct. 6, 2009 |
| 7596682 |
Architected register file system utilizes status and control registers to control read/write operations between threads |
Sep. 29, 2009 |
| 7596683 |
Switching processor threads during long latencies |
Sep. 29, 2009 |
| 7590774 |
Method and system for efficient context swapping |
Sep. 15, 2009 |
| 7587584 |
Mechanism to exploit synchronization overhead to improve multithreaded performance |
Sep. 8, 2009 |
| 7587585 |
Flag management in processors enabled for speculative execution of micro-operation traces |
Sep. 8, 2009 |
| 7584346 |
Method and apparatus for supporting different modes of multi-threaded speculative execution |
Sep. 1, 2009 |
| 7577952 |
Common state sequences in a finite state machine |
Aug. 18, 2009 |
| 7571318 |
Method and apparatus for improved security in a data processor |
Aug. 4, 2009 |
| 7571304 |
Generation of multiple checkpoints in a processor that supports speculative execution |
Aug. 4, 2009 |
| 7568088 |
Flag management in processors enabled for speculative execution of micro-operation traces |
Jul. 28, 2009 |
| 7568089 |
Flag management in processors enabled for speculative execution of micro-operation traces |
Jul. 28, 2009 |
| 7562207 |
Deterministic microcontroller with context manager |
Jul. 14, 2009 |
| 7555631 |
RISC microprocessor architecture implementing multiple typed register sets |
Jun. 30, 2009 |
| 7552317 |
Methods and systems for grouping instructions using memory barrier instructions |
Jun. 23, 2009 |
| 7549085 |
Method and apparatus to insert special instruction |
Jun. 16, 2009 |
| 7546444 |
Register set used in multithreaded parallel processor architecture |
Jun. 9, 2009 |
| 7543136 |
System and method for managing divergent threads using synchronization tokens and program instructions that include set-synchronization bits |
Jun. 2, 2009 |
| 7536690 |
Deferred task swapping in a multithreaded environment |
May. 19, 2009 |
| 7529916 |
Data processing apparatus and method for controlling access to registers |
May. 5, 2009 |
| 7529915 |
Context switching processor with multiple context control register sets including write address register identifying destination register for waiting context to store returned data from extern |
May. 5, 2009 |
| 7526636 |
Parallel multithread processor (PMT) with split contexts |
Apr. 28, 2009 |
| 7523455 |
Method and system for application managed context switching |
Apr. 21, 2009 |
| 7516311 |
Deterministic microcontroller context arrangement |
Apr. 7, 2009 |
| 7512773 |
Context switching using halt sequencing protocol |
Mar. 31, 2009 |
| 7503049 |
Information processing apparatus operable to switch operating systems |
Mar. 10, 2009 |
| 7496921 |
Processing block with integrated light weight multi-threading support |
Feb. 24, 2009 |
| 7496896 |
Accessing return values and exceptions |
Feb. 24, 2009 |
| 7493621 |
Context switch data prefetching in multithreaded computer |
Feb. 17, 2009 |
| 7493478 |
Enhanced processor virtualization mechanism via saving and restoring soft processor/system states |
Feb. 17, 2009 |
| 7490178 |
Threshold on unblocking a processing node that is blocked due data packet passing |
Feb. 10, 2009 |
| 7490228 |
Processor with register dirty bit tracking for efficient context switch |
Feb. 10, 2009 |
| 7487335 |
Method and apparatus for accessing registers during deferred execution |
Feb. 3, 2009 |
| 7487339 |
Method and apparatus for binding shadow registers to vectored interrupts |
Feb. 3, 2009 |
| 7478394 |
Context-corrupting context switching |
Jan. 13, 2009 |
| 7475224 |
Register map unit supporting mapping of multiple register specifier classes |
Jan. 6, 2009 |
| 7475230 |
Method and apparatus for performing register file checkpointing to support speculative execution within a processor |
Jan. 6, 2009 |
| 7475229 |
Executing instruction for processing by ALU accessing different scope of variables using scope index automatically changed upon procedure call and exit |
Jan. 6, 2009 |
| 7472051 |
Dependable microcontroller, method for designing a dependable microcontroller and computer program product therefor |
Dec. 30, 2008 |
| 7469334 |
Method and apparatus for facilitating a fast restart after speculative execution |
Dec. 23, 2008 |
| 7467289 |
Indicating acknowledge of stable state of pipeline resource when freeze bit set and context switch inhibited |
Dec. 16, 2008 |
| 7461242 |
Method and apparatus for providing context switching of logic in an integrated circuit using test scan circuitry |
Dec. 2, 2008 |
| 7454600 |
Method and apparatus for assigning thread priority in a processor or the like |
Nov. 18, 2008 |
| 7451296 |
Method and apparatus for pausing execution in a processor or the like |
Nov. 11, 2008 |
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