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Class Information
Number: 712/224
Name: Electrical computers and digital processing systems: processing architectures and instruction processing (e.g., processors) > Processing control > Logic operation instruction processing > Masking
Description: Subject matter for control of execution or processing of instruction data peculiar to blocking and passing data elements contained within memory words or processor registers.

Patents under this class:
1 2 3 4

Patent Number Title Of Patent Date Issued
8549251 Methods and apparatus for efficient modification of values within computing registers Oct. 1, 2013
8392666 Low power high speed load-store collision detector Mar. 5, 2013
8370608 Copy-propagate, propagate-post, and propagate-prior instructions for processing vectors Feb. 5, 2013
8364938 Running-AND, running-OR, running-XOR, and running-multiply instructions for processing vectors using a base value from a key element of an input vector Jan. 29, 2013
8356164 Shift-in-right instructions for processing vectors Jan. 15, 2013
8356162 Execution unit with data dependent conditional write instructions Jan. 15, 2013
8332620 System, method and computer program product for executing a high level programming language conditional statement Dec. 11, 2012
8250576 Structured task hierarchy for a parallel runtime Aug. 21, 2012
8245195 System and method for debugging a computer program Aug. 14, 2012
8225075 Method and apparatus for shuffling data Jul. 17, 2012
8209522 System and method for extracting fields from packets having fields spread over more than one register Jun. 26, 2012
8201170 Operating systems are executed on common program and interrupt service routine of low priority OS is modified to response to interrupts from common program only Jun. 12, 2012
8191085 Method and apparatus for loading or storing multiple registers in a data processing system May. 29, 2012
8161270 Packet data modification processor Apr. 17, 2012
8145885 Apparatus for randomizing instruction thread interleaving in a multi-thread processor Mar. 27, 2012
8127117 Method and system to combine corresponding half word units from multiple register units within a microprocessor Feb. 28, 2012
8086830 Arithmetic processing apparatus Dec. 27, 2011
7949697 Bit field operation circuit May. 24, 2011
7913255 Background thread processing in a multithread digital signal processor Mar. 22, 2011
7895419 Rotate then operate on selected bits facility and instructions therefore Feb. 22, 2011
7895423 Method for extracting fields from packets having fields spread over more than one register Feb. 22, 2011
7849293 Method and structure for low latency load-tagged pointer instruction for computer microarchitechture Dec. 7, 2010
7849466 Controlling execution mode of program threads by applying a mask to a control register in a multi-threaded processor Dec. 7, 2010
7818549 Event driven digital signal processor with time constraints Oct. 19, 2010
7685408 Methods and apparatus for extracting bits of a source register based on a mask and right justifying the bits into a target register Mar. 23, 2010
7634638 Instruction encoding for system register bit set and clear Dec. 15, 2009
7600100 Instruction encoding for system register bit set and clear Oct. 6, 2009
7581091 System and method for extracting fields from packets having fields spread over more than one register Aug. 25, 2009
7565515 Method and software for store multiplex operation Jul. 21, 2009
7558948 Method for providing zero overhead looping using carry chain masking Jul. 7, 2009
7555636 Atomically updating 64 bit fields in the 32 bit AIX kernel Jun. 30, 2009
7543287 Using a block device interface to invoke device controller functionality Jun. 2, 2009
7529907 Method and apparatus for improved computer load and store operations May. 5, 2009
7526635 Programmable processor and system for store multiplex operation Apr. 28, 2009
7493481 Direct hardware processing of internal data structure fields Feb. 17, 2009
7480787 Method and structure for pipelining of SIMD conditional moves Jan. 20, 2009
7437541 Atomically updating 64 bit fields in the 32 bit AIX kernel Oct. 14, 2008
7404068 Single operation per-bit memory access Jul. 22, 2008
7401204 Parallel Processor efficiently executing variable instruction word Jul. 15, 2008
7401208 Method and apparatus for randomizing instruction thread interleaving in a multi-thread processor Jul. 15, 2008
7373463 Antifraud method and circuit for an integrated circuit register containing data obtained from secret quantities May. 13, 2008
7370184 Shifter for alignment with bit formatter gating bits from shifted operand, shifted carry operand and most significant bit May. 6, 2008
7353501 Generic wrapper scheme Apr. 1, 2008
7350058 Shift and insert instruction for overwriting a subset of data within a register with a shifted result of another register Mar. 25, 2008
7330937 Management of stack-based memory usage in a processor Feb. 12, 2008
7318014 Bit accurate hardware simulation in system level simulators Jan. 8, 2008
7302511 Chipset support for managing hardware interrupts in a virtual machine system Nov. 27, 2007
7290122 Dataflow graph compression for power reduction in a vector processor Oct. 30, 2007
7290289 Processor with several calculating units Oct. 30, 2007
7278011 Completion table configured to track a larger number of outstanding instructions without increasing the size of the completion table Oct. 2, 2007

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