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Class Information
Number: 712/223
Name: Electrical computers and digital processing systems: processing architectures and instruction processing (e.g., processors) > Processing control > Logic operation instruction processing
Description: Subject matter for control of execution or processing of instruction data peculiar to logic operation (e.g., AND, OR, exclusive OR, etc.).

Sub-classes under this class:

Class Number Class Name Patents
712/224 Masking 179

Patents under this class:
1 2 3 4 5

Patent Number Title Of Patent Date Issued
8624916 Processing global atomic operations using the bending unit datapath Jan. 7, 2014
8607241 Compare and exchange operation using sleep-wakeup mechanism Dec. 10, 2013
8583904 Processing vectors using wrapping negation instructions in the macroscalar architecture Nov. 12, 2013
8560815 Processing vectors using wrapping boolean instructions in the macroscalar architecture Oct. 15, 2013
8539206 Method and apparatus for universal logical operations utilizing value indexing Sep. 17, 2013
8504807 Rotate instructions that complete execution without reading carry flag Aug. 6, 2013
8494831 Method to simulate a digital system Jul. 23, 2013
8464031 Running unary operation instructions for processing vectors Jun. 11, 2013
8433883 Inclusive "OR" bit matrix compare resolution of vector update conflict masks Apr. 30, 2013
8423748 Register control circuit and register control method Apr. 16, 2013
8417922 Method and system to combine multiple register units within a microprocessor Apr. 9, 2013
8411103 Processing global atomic operations using the bending unit datapath Apr. 2, 2013
8407456 Method and instruction set including register shifts and rotates for data processing Mar. 26, 2013
8364938 Running-AND, running-OR, running-XOR, and running-multiply instructions for processing vectors using a base value from a key element of an input vector Jan. 29, 2013
8307197 Short-circuit evaluation of Boolean expression by rolling up sub-expression result in registers storing default value Nov. 6, 2012
8281111 System and method to execute a linear feedback-shift instruction Oct. 2, 2012
8214626 Method and apparatus for shuffling data Jul. 3, 2012
8200951 System and method for efficiently performing bit-field extraction and bit-field combination operations in a processor Jun. 12, 2012
8161270 Packet data modification processor Apr. 17, 2012
8122436 Privacy enhanced error reports Feb. 21, 2012
8117424 Systems, devices, and/or methods for managing programmable logic controller processing Feb. 14, 2012
8049760 System and method for vector computations in arithmetic logic units (ALUs) Nov. 1, 2011
8024678 Interfacing with a dynamically configurable arithmetic unit Sep. 20, 2011
8024552 Performing variable and/or bitwise shift operation for a shift instruction that does not provide a variable or bitwise shift option Sep. 20, 2011
8001360 Method and software for partitioned group element selection operation Aug. 16, 2011
7987344 Multithreaded programmable processor and system with partitioned operations Jul. 26, 2011
7979681 System and method of selectively accessing a register file Jul. 12, 2011
7969185 Logical circuit device, logical operation varying method, and logical operation system Jun. 28, 2011
7917906 Resource allocation in a computer-based system Mar. 29, 2011
7849466 Controlling execution mode of program threads by applying a mask to a control register in a multi-threaded processor Dec. 7, 2010
7783627 Database retrieval with a unique key search on a parallel computer system Aug. 24, 2010
7761695 Programmable data processor for a variable length encoder/decoder Jul. 20, 2010
7752424 Null value checking instruction Jul. 6, 2010
7721072 Information processing method and apparatus, recording medium, and program May. 18, 2010
7627458 Resource and context based multiplier generation Dec. 1, 2009
7624251 Instructions for efficiently accessing unaligned partial vectors Nov. 24, 2009
7620797 Instructions for efficiently accessing unaligned vectors Nov. 17, 2009
7610472 Performing variable and/or bitwise shift operation for a shift instruction that does not provide a variable or bitwise shift option Oct. 27, 2009
7594099 Processor executing SIMD instructions Sep. 22, 2009
7565514 Parallel condition code generation for SIMD operations Jul. 21, 2009
7529918 System and method for efficiently performing bit-field extraction and bit-field combination operations in a processor May. 5, 2009
7519795 Method and system for performing permutations with bit permutation instructions Apr. 14, 2009
7509602 Compact processor element for a scalable digital logic verification and emulation system Mar. 24, 2009
7496196 Method apparatus and system of performing one or more encryption and/or decryption operations Feb. 24, 2009
7493447 System and method for caching sequential programs Feb. 17, 2009
7451293 Array of Boolean logic controlled processing elements with concurrent I/O processing and instruction sequencing Nov. 11, 2008
7406592 Method, system, and apparatus for efficient evaluation of boolean expressions Jul. 29, 2008
7370180 Bit field extraction with sign or zero extend May. 6, 2008
7360066 Boolean processor Apr. 15, 2008
7353367 System and software for catenated group shift instruction Apr. 1, 2008

1 2 3 4 5

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