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Class Information
Number: 712/215
Name: Electrical computers and digital processing systems: processing architectures and instruction processing (e.g., processors) > Instruction issuing > Simultaneous issuance of multiple instructions
Description: Subject matter including means or steps for issuing plural instructions in parallel (e.g., superscalar, very long instruction word (VLIW)).

Patents under this class:
1 2 3 4 5 6 7 8 9 10 11 12 13

Patent Number Title Of Patent Date Issued
8707094 Fault tolerant stability critical execution checking using redundant execution pipelines Apr. 22, 2014
8677078 Systems and methods for accessing wide registers Mar. 18, 2014
8669990 Sharing resources between a CPU and GPU Mar. 11, 2014
8661227 Multi-level register file supporting multiple threads Feb. 25, 2014
8612728 Reducing data hazards in pipelined processors to provide high processor utilization Dec. 17, 2013
8601244 Apparatus and method for generating VLIW, and processor and method for processing VLIW Dec. 3, 2013
8601177 Dynamic allocation of a buffer across multiple clients in a threaded processor Dec. 3, 2013
8595468 Reverse simultaneous multi-threading Nov. 26, 2013
8589634 Processor extensions for accelerating spectral band replication Nov. 19, 2013
8533399 Cache directory look-up re-use as conflict check mechanism for speculative memory requests Sep. 10, 2013
8533721 Method and system of scheduling out-of-order operations without the requirement to execute compare, ready and pick logic in a single cycle Sep. 10, 2013
8527740 Mechanism of supporting sub-communicator collectives with O(64) counters as opposed to one counter for each sub-communicator Sep. 3, 2013
8521991 Reducing instruction collisions in a processor Aug. 27, 2013
8516224 Pipeline replay support for multicycle operations Aug. 20, 2013
8484442 Apparatus and method for control processing in dual path processor Jul. 9, 2013
8458716 Enterprise resource planning with asynchronous notifications of background processing events Jun. 4, 2013
8448154 Method, apparatus and software for processing software for use in a multithreaded processing environment May. 21, 2013
8412980 Fault tolerant stability critical execution checking using redundant execution pipelines Apr. 2, 2013
8402256 Processing prefix code in instruction queue storing fetched sets of plural instructions in superscalar processor Mar. 19, 2013
8397238 Thread allocation and clock cycle adjustment in an interleaved multi-threaded processor Mar. 12, 2013
8387065 Speculative popcount data creation Feb. 26, 2013
8359462 Method and apparatus for programmable coupling between CPU and co-processor Jan. 22, 2013
8327115 Plural matrices of execution units for processing matrices of row dependent instructions in single clock cycle in super or separate mode Dec. 4, 2012
8281054 Methods and apparatus for improved host/initiator utilization in serial advanced technology attachment communication Oct. 2, 2012
8255911 System and method for selecting and assigning a basic module with a minimum transfer cost to thread Aug. 28, 2012
8250395 Dynamic voltage and frequency scaling (DVFS) control for simultaneous multi-threading (SMT) processors Aug. 21, 2012
8230410 Utilizing a bidding model in a microparallel processor architecture to allocate additional registers and execution units for short to intermediate stretches of code identified as opportunities Jul. 24, 2012
8230422 Assist thread for injecting cache memory in a microprocessor Jul. 24, 2012
8225012 Dynamic allocation of a buffer across multiple clients in a threaded processor Jul. 17, 2012
8219996 Computer processor with fairness monitor Jul. 10, 2012
8214617 Apparatus and method of avoiding bank conflict in single-port multi-bank memory system Jul. 3, 2012
8200944 Method for instruction pipelining on irregular register files Jun. 12, 2012
8196027 Method and device for comparing data in a computer system having at least two execution units Jun. 5, 2012
8179540 Image forming apparatus and management system utilizing counter and job log information for usage tracking May. 15, 2012
8171484 Resource management apparatus and radio network controller May. 1, 2012
8165025 Method and apparatus for generating a unique packet identifier Apr. 24, 2012
8151092 Control signal memoization in a multiple instruction issue microprocessor Apr. 3, 2012
8145884 Apparatus, method and instruction for initiation of concurrent instruction streams in a multithreading microprocessor Mar. 27, 2012
8141088 Multithreaded processor Mar. 20, 2012
8140831 Routing instructions in a processor Mar. 20, 2012
8140829 Multithreaded processor and method for switching threads by swapping instructions between buffers while pausing execution Mar. 20, 2012
8131978 Restoring plural instructions for same cycle execution from partial instructions and combined supplementing portions generated for compact storage Mar. 6, 2012
8127115 Group formation with multiple taken branches per group Feb. 28, 2012
8117423 Pipeline replay support for multicycle operations Feb. 14, 2012
8112758 Methods and apparatus for resource allocation in partial fault tolerant applications Feb. 7, 2012
8108656 Task definition for specifying resource requirements Jan. 31, 2012
8103854 Methods and apparatus for independent processor node operations in a SIMD array processor Jan. 24, 2012
8103856 Performance monitoring for new phase dynamic optimization of instruction dispatch cluster configuration Jan. 24, 2012
8095780 Register systems and methods for a multi-issue processor Jan. 10, 2012
8090930 Method and circuits for early detection of a full queue Jan. 3, 2012

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