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Class Information
Number: 712/21
Name: Electrical computers and digital processing systems: processing architectures and instruction processing (e.g., processors) > Processing architecture > Array processor > Array processor operation > Multiple instruction, multiple data (mimd)
Description: Subject matter wherein the array processor operates in a multiple instruction, multiple data mode.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7610371 |
Mediation system and method with real time processing capability |
Oct. 27, 2009 |
| 7593947 |
System, method and program for grouping data update requests for efficient processing |
Sep. 22, 2009 |
| 7512724 |
Multi-thread peripheral processing using dedicated peripheral bus |
Mar. 31, 2009 |
| 7340591 |
Providing parallel operand functions using register file and extra path storage |
Mar. 4, 2008 |
| 7313646 |
Interfacing of functional modules in an on-chip system |
Dec. 25, 2007 |
| 7124318 |
Multiple parallel pipeline processor having self-repairing capability |
Oct. 17, 2006 |
| 7035991 |
Surface computer and computing method using the same |
Apr. 25, 2006 |
| 6993639 |
Processing instruction addressed by received remote instruction and generating remote instruction to respective output port for another cell |
Jan. 31, 2006 |
| 6950893 |
Hybrid switching architecture |
Sep. 27, 2005 |
| 6925548 |
Data processor assigning the same operation code to multiple operations |
Aug. 2, 2005 |
| 6915410 |
Compiler synchronized multi-processor programmable logic device with direct transfer of computation results among processors |
Jul. 5, 2005 |
| 6836837 |
Register addressing |
Dec. 28, 2004 |
| 6829697 |
Multiple logical interfaces to a shared coprocessor resource |
Dec. 7, 2004 |
| 6826522 |
Methods and apparatus for improved efficiency in pipeline simulation and emulation |
Nov. 30, 2004 |
| 6820188 |
Method and apparatus for varying instruction streams provided to a processing device using masks |
Nov. 16, 2004 |
| 6820187 |
Multiprocessor system and control method thereof |
Nov. 16, 2004 |
| 6795909 |
Methods and apparatus for ManArray PE-PE switch control |
Sep. 21, 2004 |
| 6766437 |
Composite uniprocessor |
Jul. 20, 2004 |
| 6728862 |
Processor array and parallel data processing methods |
Apr. 27, 2004 |
| 6647408 |
Task distribution |
Nov. 11, 2003 |
| 6601157 |
Register addressing |
Jul. 29, 2003 |
| 6578133 |
MIMD array of single bit processors for processing logic equations in strict sequential order |
Jun. 10, 2003 |
| 6513108 |
Programmable processing engine for efficiently processing transient data |
Jan. 28, 2003 |
| 6453412 |
Method and apparatus for reissuing paired MMX instructions singly during exception handling |
Sep. 17, 2002 |
| 6446191 |
Methods and apparatus for efficient synchronous MIMD operations with iVLIW PE-to-PE communication |
Sep. 3, 2002 |
| 6404439 |
SIMD control parallel processor with simplified configuration |
Jun. 11, 2002 |
| 6366997 |
Methods and apparatus for manarray PE-PE switch control |
Apr. 2, 2002 |
| 6341343 |
Parallel processing instructions routed through plural differing capacity units of operand address generators coupled to multi-ported memory and ALUs |
Jan. 22, 2002 |
| 6321322 |
Methods and apparatus for scalable instruction set architecture with dynamic compact instructions |
Nov. 20, 2001 |
| 6219776 |
Merged array controller and processing element |
Apr. 17, 2001 |
| 6192384 |
System and method for performing compound vector operations |
Feb. 20, 2001 |
| 6173389 |
Methods and apparatus for dynamic very long instruction word sub-instruction selection for execution time parallelism in an indirect very long instruction word processor |
Jan. 9, 2001 |
| 6161159 |
Multimedia computer with integrated circuit memory |
Dec. 12, 2000 |
| 6158000 |
Shared memory initialization method for system having multiple processor capability |
Dec. 5, 2000 |
| 6128720 |
Distributed processing array with component processors performing customized interpretation of instructions |
Oct. 3, 2000 |
| 6067610 |
Method and data processor for synchronizing multiple masters using multi-bit synchronization indicators |
May. 23, 2000 |
| 6049861 |
Locating and sampling of data in parallel processing systems |
Apr. 11, 2000 |
| 6041400 |
Distributed extensible processing architecture for digital signal processing applications |
Mar. 21, 2000 |
| 6038584 |
Synchronized MIMD multi-processing system and method of operation |
Mar. 14, 2000 |
| 6038651 |
SMP clusters with remote resource managers for distributing work to other clusters while reducing bus traffic to a minimum |
Mar. 14, 2000 |
| 5933624 |
Synchronized MIMD multi-processing system and method inhibiting instruction fetch at other processors while one processor services an interrupt |
Aug. 3, 1999 |
| 5892890 |
Computer system with parallel processor for pixel arithmetic |
Apr. 6, 1999 |
| 5881272 |
Synchronized MIMD multi-processing system and method inhibiting instruction fetch at other processors on write to program counter of one processor |
Mar. 9, 1999 |
| 5815680 |
SIMD multiprocessor with an interconnection network to allow a datapath element to access local memories |
Sep. 29, 1998 |
| 5809288 |
Synchronized MIMD multi-processing system and method inhibiting instruction fetch on memory access stall |
Sep. 15, 1998 |
| 5781775 |
Parallel process scheduling method in a parallel computer and a processing apparatus for a parallel computer |
Jul. 14, 1998 |
| 5765037 |
System for executing instructions with delayed firing times |
Jun. 9, 1998 |
| 5708835 |
Dual-directional parallel processor |
Jan. 13, 1998 |
| 5701482 |
Modular array processor architecture having a plurality of interconnected load-balanced parallel processing nodes |
Dec. 23, 1997 |
| 5701416 |
Adaptive routing mechanism for torus interconnection network |
Dec. 23, 1997 |
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