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Class Information
Number: 712/205
Name: Electrical computers and digital processing systems: processing architectures and instruction processing (e.g., processors) > Instruction fetching
Description: Subject matter directed to locating and retrieval of instruction data for processing.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7620803 |
Data processing device and electronic equipment using pipeline control |
Nov. 17, 2009 |
| 7587532 |
Full/selector output from one of plural flag generation count outputs |
Sep. 8, 2009 |
| 7577824 |
Methods and apparatus for storing expanded width instructions in a VLIW memory for deferred execution |
Aug. 18, 2009 |
| 7555605 |
Data processing system having cache memory debugging support and method therefor |
Jun. 30, 2009 |
| 7552313 |
VLIW digital signal processor for achieving improved binary translation |
Jun. 23, 2009 |
| 7518993 |
Prioritizing resource utilization in multi-thread computing system |
Apr. 14, 2009 |
| 7511712 |
Facilitating performance analysis for processing |
Mar. 31, 2009 |
| 7502911 |
Variable length instruction fetching that retrieves second instruction in dependence upon first instruction length |
Mar. 10, 2009 |
| 7503049 |
Information processing apparatus operable to switch operating systems |
Mar. 10, 2009 |
| 7500088 |
Methods and apparatus for updating of a branch history table |
Mar. 3, 2009 |
| 7500066 |
Method and apparatus for sharing instruction memory among a plurality of processors |
Mar. 3, 2009 |
| 7500062 |
Fast path memory read request processing in a multi-level memory architecture |
Mar. 3, 2009 |
| 7496771 |
Processor accessing a scratch pad on-demand to reduce power consumption |
Feb. 24, 2009 |
| 7493621 |
Context switch data prefetching in multithreaded computer |
Feb. 17, 2009 |
| 7484077 |
Skipping unnecessary instruction by multiplex selector using next instruction offset stride signal generated from instructions comparison results |
Jan. 27, 2009 |
| 7480783 |
Systems for loading unaligned words and methods of operating the same |
Jan. 20, 2009 |
| 7480810 |
Voltage droop dynamic recovery |
Jan. 20, 2009 |
| 7461212 |
Non-inclusive cache system with simple control operation |
Dec. 2, 2008 |
| 7454596 |
Method and apparatus for partitioned pipelined fetching of multiple execution threads |
Nov. 18, 2008 |
| 7447876 |
System and method for handling load and/or store operations in a superscalar microprocessor |
Nov. 4, 2008 |
| 7441101 |
Thread-aware instruction fetching in a multithreaded embedded processor |
Oct. 21, 2008 |
| 7441102 |
Integrated circuit with functional state configurable memory and method of configuring functional states of the integrated circuit memory |
Oct. 21, 2008 |
| 7434029 |
Inter-processor control |
Oct. 7, 2008 |
| 7434035 |
Method and system for processing instructions in grouped and non-grouped modes |
Oct. 7, 2008 |
| 7406585 |
Data processing system having an external instruction set and an internal instruction set |
Jul. 29, 2008 |
| 7404042 |
Handling cache miss in an instruction crossing a cache line boundary |
Jul. 22, 2008 |
| 7376819 |
Data processor with selectable word length |
May. 20, 2008 |
| 7366875 |
Method and apparatus for an efficient multi-path trace cache design |
Apr. 29, 2008 |
| 7363625 |
Method for changing a thread priority in a simultaneous multithread processor |
Apr. 22, 2008 |
| 7356674 |
Method and apparatus for fetching instructions from the memory subsystem of a mixed architecture processor into a hardware emulation engine |
Apr. 8, 2008 |
| 7350030 |
High performance chipset prefetcher for interleaved channels |
Mar. 25, 2008 |
| 7340566 |
System and method for initializing a memory device from block oriented NAND flash |
Mar. 4, 2008 |
| 7340587 |
Information processing apparatus, microcomputer, and electronic computer |
Mar. 4, 2008 |
| 7328327 |
Technique for reducing traffic in an instruction fetch unit of a chip multiprocessor |
Feb. 5, 2008 |
| 7328329 |
Controlling processing of data stream elements using a set of specific function units |
Feb. 5, 2008 |
| 7293177 |
Preventing virus infection in a computer system |
Nov. 6, 2007 |
| 7290119 |
Memory accelerator with two instruction set fetch path to prefetch second set while executing first set of number of instructions in access delay to instruction cycle ratio |
Oct. 30, 2007 |
| 7269712 |
Thread selection for fetching instructions for pipeline multi-threaded processor |
Sep. 11, 2007 |
| 7263599 |
Thread ID in a multithreaded processor |
Aug. 28, 2007 |
| 7260704 |
Method and apparatus for reinforcing a prefetch chain |
Aug. 21, 2007 |
| 7254689 |
Decompression of block-sorted data |
Aug. 7, 2007 |
| 7254700 |
Fencing off instruction buffer until re-circulation of rejected preceding and branch instructions to avoid mispredict flush |
Aug. 7, 2007 |
| 7249352 |
Apparatus and method for removing elements from a linked list |
Jul. 24, 2007 |
| 7237093 |
Instruction fetching system in a multithreaded processor utilizing cache miss predictions to fetch instructions from multiple hardware streams |
Jun. 26, 2007 |
| 7237095 |
Optimum power efficient shifting algorithm for schedulers |
Jun. 26, 2007 |
| 7234025 |
Microprocessor with repeat prefetch instruction |
Jun. 19, 2007 |
| 7219185 |
Apparatus and method for selecting instructions for execution based on bank prediction of a multi-bank cache |
May. 15, 2007 |
| 7200736 |
Method and system for substantially registerless processing |
Apr. 3, 2007 |
| 7185177 |
Methods and apparatus for meta-architecture defined programmable instruction fetch functions supporting assembled variable length instruction processors |
Feb. 27, 2007 |
| 7181485 |
Variably delayable transmission of packets between independently clocked source, intermediate, and destination circuits while maintaining orderly and timely processing in one or both of the in |
Feb. 20, 2007 |
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