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Class Information
Number: 712/204
Name: Electrical computers and digital processing systems: processing architectures and instruction processing (e.g., processors) > Instruction alignment
Description: Subject matter including accessing and retrieval of instruction data of a fixed or variable length from a memory or buffer and for shifting of such instruction data to align it with a physical memory or buffer boundary.


Patents under this class:
1 2 3 4 5

Patent Number Title Of Patent Date Issued
7624251 Instructions for efficiently accessing unaligned partial vectors Nov. 24, 2009
7620787 Optimizing memory accesses for network applications using indexed register files Nov. 17, 2009
7620797 Instructions for efficiently accessing unaligned vectors Nov. 17, 2009
7610466 Data processing system using independent memory and register operand size specifiers and method thereof Oct. 27, 2009
7587532 Full/selector output from one of plural flag generation count outputs Sep. 8, 2009
7587535 Data transfer control device including endian conversion circuit with data realignment Sep. 8, 2009
7577777 Computer system providing endian information and method of data transmission thereof Aug. 18, 2009
7568070 Instruction cache having fixed number of variable length instructions Jul. 28, 2009
7565510 Microprocessor with a register selectively storing unaligned load instructions and control method thereof Jul. 21, 2009
7525457 Transforming design objects in a computer by converting data sets between data set types Apr. 28, 2009
7480783 Systems for loading unaligned words and methods of operating the same Jan. 20, 2009
7473293 Processor for executing instructions containing either single operation or packed plurality of operations dependent upon instruction status indicator Jan. 6, 2009
7467327 Method and system of aligning execution point of duplicate copies of a user program by exchanging information about instructions executed Dec. 16, 2008
7444488 Method and programmable unit for bit field shifting Oct. 28, 2008
7437537 Methods and apparatus for predicting unaligned memory access Oct. 14, 2008
7412584 Data alignment micro-architecture systems and methods Aug. 12, 2008
7404019 Method and apparatus for endianness control in a data processing system Jul. 22, 2008
7404042 Handling cache miss in an instruction crossing a cache line boundary Jul. 22, 2008
7392337 System, method and storage medium for a memory subsystem command interface Jun. 24, 2008
7392366 Adaptive fetch gating in multithreaded processors, fetch control and method of controlling fetches Jun. 24, 2008
7386706 System and software for matched aligned and unaligned storage instructions Jun. 10, 2008
7360059 Variable width alignment engine for aligning instructions based on transition between buffers Apr. 15, 2008
7353371 Circuit to extract nonadjacent bits from data packets Apr. 1, 2008
7343473 System and method for translating non-native instructions to native instructions for processing on a host processor Mar. 11, 2008
7334066 Computer system providing endian information and method of data transmission thereof Feb. 19, 2008
7328433 Methods and apparatus for reducing memory latency in a software application Feb. 5, 2008
7305542 Instruction length decoder Dec. 4, 2007
7302552 System for processing VLIW words containing variable length instructions having embedded instruction length identifiers Nov. 27, 2007
7296108 Apparatus and method for efficient transmission of unaligned data Nov. 13, 2007
7293177 Preventing virus infection in a computer system Nov. 6, 2007
7275147 Method and apparatus for data alignment and parsing in SIMD computer architecture Sep. 25, 2007
7272675 First-in-first-out (FIFO) memory for buffering packet fragments through use of read and write pointers incremented by a unit access and a fraction of the unit access Sep. 18, 2007
7249352 Apparatus and method for removing elements from a linked list Jul. 24, 2007
7234045 Apparatus and method for handling BTAC branches that wrap across instruction cache lines Jun. 19, 2007
7222225 Programmable processor and method for matched aligned and unaligned storage instructions May. 22, 2007
7213129 Method and system for a two stage pipelined instruction decode and alignment using previous instruction length May. 1, 2007
7210023 Data processing apparatus and method for moving data between registers and memory in response to an access instruction having an alignment specifier identifying an alignment to be associated w Apr. 24, 2007
7203824 Apparatus and method for handling BTAC branches that wrap across instruction cache lines Apr. 10, 2007
7203636 Endian transformation Apr. 10, 2007
7181562 Wired endian method and apparatus for performing the same Feb. 20, 2007
7134000 Methods and apparatus for instruction alignment including current instruction pointer logic responsive to instruction length information Nov. 7, 2006
7134001 Pipeline replay support for unaligned memory operations Nov. 7, 2006
7107584 Data alignment between native and non-native shared data structures Sep. 12, 2006
7089393 Data processing using a coprocessor Aug. 8, 2006
7082516 Aligning instructions using a variable width alignment engine having an intelligent buffer refill mechanism Jul. 25, 2006
7051168 Method and apparatus for aligning memory write data in a microprocessor May. 23, 2006
7047396 Fixed length memory to memory arithmetic and architecture for a communications embedded processor system May. 16, 2006
6996678 Method and apparatus for randomized cache entry replacement Feb. 7, 2006
6996735 Apparatus for alignment of data collected from multiple pipe stages with heterogeneous retention policies in an unprotected pipeline Feb. 7, 2006
6981127 Apparatus and method for aligning variable-width instructions with a prefetch buffer Dec. 27, 2005

1 2 3 4 5


 
 
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