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Class Information
Number: 712/201
Name: Electrical computers and digital processing systems: processing architectures and instruction processing (e.g., processors) > Architecture based instruction processing > Data flow based system
Description: Subject matter wherein initiation of instruction execution is driven by availability of data required by the instruction.


Patents under this class:
1 2 3 4

Patent Number Title Of Patent Date Issued
7613902 Device and method for enabling efficient and flexible reconfigurable computing Nov. 3, 2009
7606943 Adaptable datapath for a digital processing system Oct. 20, 2009
7555738 Integrated structure layout and layout of interconnections for an instruction execution unit of an integrated circuit chip Jun. 30, 2009
7503051 Broadcast data receiving device and method for receiving a plurality of multimedia data Mar. 10, 2009
7493469 Performance evaluation apparatus, performance evaluation method, program and computer readable recording medium Feb. 17, 2009
7415595 Data processing without processor core intervention by chain of accelerators selectively coupled by programmable interconnect network and to memory Aug. 19, 2008
7409533 Asynchronous communication among hardware object nodes in IC with receive and send ports protocol registers using temporary register bypass select for validity information Aug. 5, 2008
7406584 IC comprising network of microprocessors communicating data messages along asynchronous channel segments using ports including validity and accept signal registers and with split / join capabi Jul. 29, 2008
7398329 Pipelined I/O execution Jul. 8, 2008
7386636 System and method for communicating command parameters between a processor and a memory flow controller Jun. 10, 2008
7353516 Data flow control for adaptive integrated circuitry Apr. 1, 2008
7251721 Conditional link pointer register sets marking the beginning and end of a conditional instruction block where each set corresponds to a single stage of a pipeline that moves link pointers thro Jul. 31, 2007
7240347 Systems and methods for preserving the order of data Jul. 3, 2007
7225319 Digital architecture for reconfigurable computing in digital signal processing May. 29, 2007
7174525 Integrated structure layout and layout of interconnections for an instruction execution unit of an integrated circuit chip Feb. 6, 2007
7143266 Storing immediate data of immediate instructions in a data table Nov. 28, 2006
7114008 Edge adapter architecture apparatus and method Sep. 26, 2006
7085850 Stateless message processing scheme for network processors interactions Aug. 1, 2006
7062762 Partitioning symmetric nodes efficiently in a split register file architecture Jun. 13, 2006
7051186 Selective bypassing of a multi-port register file May. 23, 2006
7035996 Generating data type token value error in stream computer Apr. 25, 2006
7000098 Passing a received packet for modifying pipelining processing engines' routine instructions Feb. 14, 2006
6993639 Processing instruction addressed by received remote instruction and generating remote instruction to respective output port for another cell Jan. 31, 2006
6976150 Resource flow computing device Dec. 13, 2005
6970996 Operand queue for use in a floating point unit to reduce read-after-write latency and method of operation Nov. 29, 2005
6954842 Methods and apparatus to support conditional execution in a VLIW-based array processor with subword execution Oct. 11, 2005
6954843 Data driven information processor capable of internally processing data in a constant frequency irrespective of an input frequency of a data packet from the outside Oct. 11, 2005
6941448 Data-driven processor having multiple-precision data processing function and data processing method thereof Sep. 6, 2005
6934938 Method of programming linear graphs for streaming vector computation Aug. 23, 2005
6904512 Data flow processor Jun. 7, 2005
6889310 Multithreaded data/context flow processing architecture May. 3, 2005
6874079 Adaptive computing engine with dataflow graph based sequencing in reconfigurable mini-matrices of composite functional blocks Mar. 29, 2005
6839889 Mixed hardware/software architecture and method for processing xDSL communications Jan. 4, 2005
6823443 Data driven type apparatus and method with router operating at a different transfer rate than system to attain higher throughput Nov. 23, 2004
6782521 Integrated structure layout and layout of interconnections for an instruction execution unit of an integrated circuit chip Aug. 24, 2004
6745320 Data processing apparatus Jun. 1, 2004
6742107 Dynamically configured processing of composite stream input data using next conversion determining state transition table searched by converted input data May. 25, 2004
6728862 Processor array and parallel data processing methods Apr. 27, 2004
6708272 Information encryption system and method Mar. 16, 2004
6675285 Geometric engine including a computational module without memory contention Jan. 6, 2004
6658550 Pipelined asynchronous processing Dec. 2, 2003
6631462 Memory shared between processing threads Oct. 7, 2003
6594815 Asynchronous controller generation method Jul. 15, 2003
6526500 Data driven type information processing system consisting of interconnected data driven type information processing devices Feb. 25, 2003
6519693 Method and system of program transmission optimization using a redundant transmission sequence Feb. 11, 2003
6516402 Information processing apparatus with parallel accumulation capability Feb. 4, 2003
6505291 Processor having a datapath and control logic constituted with basis execution blocks Jan. 7, 2003
6493818 Technique for pipelining synchronization to maintain throughput across two asynchronous clock domain boundaries Dec. 10, 2002
6460129 Pipeline operation method and pipeline operation device to interlock the translation of instructions based on the operation of a non-pipeline operation unit Oct. 1, 2002
6449711 Method, apparatus, and article of manufacture for developing and executing data flow programs Sep. 10, 2002

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